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Wed, 2 Sep 2020 11:53:43 +0000 (UTC) Received: from localhost (ovpn-66-226.rdu2.redhat.com [10.10.66.226]) by smtp.corp.redhat.com (Postfix) with ESMTP id 54E265C1C4; Wed, 2 Sep 2020 11:53:43 +0000 (UTC) From: Eduardo Habkost To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 12/20] Revert "hw/i386: Move arch_id decode inside x86_cpus_init" Date: Wed, 2 Sep 2020 07:53:15 -0400 Message-Id: <20200902115323.850385-13-ehabkost@redhat.com> In-Reply-To: <20200902115323.850385-1-ehabkost@redhat.com> References: <20200902115323.850385-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.001 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/02 03:24:55 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Babu Moger , Igor Mammedov , Paolo Bonzini , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Babu Moger This reverts commit 2e26f4ab3bf8390a2677d3afd9b1a04f015d7721. Remove the EPYC specific apicid decoding and use the generic default decoding. Signed-off-by: Babu Moger Reviewed-by: Igor Mammedov Message-Id: <159889934379.21294.15323080164340490855.stgit@naples-babu.amd.com> Signed-off-by: Eduardo Habkost --- hw/i386/pc.c | 6 +++--- hw/i386/x86.c | 37 +++++++------------------------------ 2 files changed, 10 insertions(+), 33 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 6b708f4341..0677d6a272 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1556,14 +1556,14 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev, topo_ids.die_id = cpu->die_id; topo_ids.core_id = cpu->core_id; topo_ids.smt_id = cpu->thread_id; - cpu->apic_id = x86ms->apicid_from_topo_ids(&topo_info, &topo_ids); + cpu->apic_id = x86_apicid_from_topo_ids(&topo_info, &topo_ids); } cpu_slot = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx); if (!cpu_slot) { MachineState *ms = MACHINE(pcms); - x86ms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); + x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); error_setg(errp, "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with" " APIC ID %" PRIu32 ", valid index range 0:%d", @@ -1584,7 +1584,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev, /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn() * once -smp refactoring is complete and there will be CPU private * CPUState::nr_cores and CPUState::nr_threads fields instead of globals */ - x86ms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); + x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); if (cpu->socket_id != -1 && cpu->socket_id != topo_ids.pkg_id) { error_setg(errp, "property socket-id: %u doesn't match set apic-id:" " 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id, diff --git a/hw/i386/x86.c b/hw/i386/x86.c index cf384b9743..3cc2318212 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -68,22 +68,6 @@ inline void init_topo_info(X86CPUTopoInfo *topo_info, topo_info->threads_per_core = ms->smp.threads; } -/* - * Set up with the new EPYC topology handlers - * - * AMD uses different apic id encoding for EPYC based cpus. Override - * the default topo handlers with EPYC encoding handlers. - */ -static void x86_set_epyc_topo_handlers(MachineState *machine) -{ - X86MachineState *x86ms = X86_MACHINE(machine); - - x86ms->apicid_from_cpu_idx = x86_apicid_from_cpu_idx_epyc; - x86ms->topo_ids_from_apicid = x86_topo_ids_from_apicid_epyc; - x86ms->apicid_from_topo_ids = x86_apicid_from_topo_ids_epyc; - x86ms->apicid_pkg_offset = apicid_pkg_offset_epyc; -} - /* * Calculates initial APIC ID for a specific CPU index * @@ -102,7 +86,7 @@ uint32_t x86_cpu_apic_id_from_index(X86MachineState *x86ms, init_topo_info(&topo_info, x86ms); - correct_id = x86ms->apicid_from_cpu_idx(&topo_info, cpu_index); + correct_id = x86_apicid_from_cpu_idx(&topo_info, cpu_index); if (x86mc->compat_apic_id_mode) { if (cpu_index != correct_id && !warned && !qtest_enabled()) { error_report("APIC IDs set in compatibility mode, " @@ -136,11 +120,6 @@ void x86_cpus_init(X86MachineState *x86ms, int default_cpu_version) MachineState *ms = MACHINE(x86ms); MachineClass *mc = MACHINE_GET_CLASS(x86ms); - /* Check for apicid encoding */ - if (cpu_x86_use_epyc_apic_id_encoding(ms->cpu_type)) { - x86_set_epyc_topo_handlers(ms); - } - x86_cpu_set_default_version(default_cpu_version); /* @@ -154,12 +133,6 @@ void x86_cpus_init(X86MachineState *x86ms, int default_cpu_version) x86ms->apic_id_limit = x86_cpu_apic_id_from_index(x86ms, ms->smp.max_cpus - 1) + 1; possible_cpus = mc->possible_cpu_arch_ids(ms); - - for (i = 0; i < ms->possible_cpus->len; i++) { - ms->possible_cpus->cpus[i].arch_id = - x86_cpu_apic_id_from_index(x86ms, i); - } - for (i = 0; i < ms->smp.cpus; i++) { x86_cpu_new(x86ms, possible_cpus->cpus[i].arch_id, &error_fatal); } @@ -184,7 +157,8 @@ int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx) init_topo_info(&topo_info, x86ms); assert(idx < ms->possible_cpus->len); - x86_topo_ids_from_idx(&topo_info, idx, &topo_ids); + x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id, + &topo_info, &topo_ids); return topo_ids.pkg_id % ms->numa_state->num_nodes; } @@ -215,7 +189,10 @@ const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms) ms->possible_cpus->cpus[i].type = ms->cpu_type; ms->possible_cpus->cpus[i].vcpus_count = 1; - x86_topo_ids_from_idx(&topo_info, i, &topo_ids); + ms->possible_cpus->cpus[i].arch_id = + x86_cpu_apic_id_from_index(x86ms, i); + x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id, + &topo_info, &topo_ids); ms->possible_cpus->cpus[i].props.has_socket_id = true; ms->possible_cpus->cpus[i].props.socket_id = topo_ids.pkg_id; if (x86ms->smp_dies > 1) {