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Tue, 01 Sep 2020 14:35:19 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gmx.net; s=badeba3b8450; t=1598985296; bh=xGoJxgZ7IVup4dbsseRwpe8Ye66tYZj9bPxD1FAfhqQ=; h=X-UI-Sender-Class:From:To:Cc:Subject:Date:In-Reply-To:References; b=HOQkd0erSw8VBmKnXABcEPkj4pQQrwtIqy9iovNMqL9r8JVioiQnJTBRHB7RXj99u Vg2A01WWnUNR15haoMk3UUldzmBnFeqYxAk3YrWNNs+/oBA82jj8TpXVIh4MT2Zb13 vh+rav53i5jMlGblJww8b89J9yr4iafnGlG2PgAU= X-UI-Sender-Class: 01bb95c1-4bf8-414a-932a-4f6e2808ef9c Received: from ls3530.fritz.box ([92.116.187.2]) by mail.gmx.com (mrgmx004 [212.227.17.190]) with ESMTPSA (Nemesis) id 1MKKZ3-1js54J1KCV-00Lr0m; Tue, 01 Sep 2020 20:34:56 +0200 From: Helge Deller To: qemu-devel@nongnu.org Subject: [PATCH 2/7] hw/hppa: Make number of TLB and BTLB entries configurable Date: Tue, 1 Sep 2020 20:34:47 +0200 Message-Id: <20200901183452.24967-3-deller@gmx.de> X-Mailer: git-send-email 2.21.3 In-Reply-To: <20200901183452.24967-1-deller@gmx.de> References: <20200901183452.24967-1-deller@gmx.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:pteqhbaMD7DUevAykGOKfs1BkkRbjJoPfRxjkCi1Mff1gaDXWbo iHR2URy4SqKBBLY+gR5MBJWg9sTyiNJHjOqZXyH78sFDzPGzs+zfIieoqaajPHFRWP0lc2F rvoi9oxcKKqplrN60IjE8f4Hk48esDtqf/PAMP0ua1tqiFaa+rFr/MVxBAZ/gpAtUbm5K9Y OIijiH7k7eZYHNt8LpaPg== X-UI-Out-Filterresults: notjunk:1; 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envelope-from=deller@gmx.de; helo=mout.gmx.net X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/01 14:35:04 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Helge Deller , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Until now the TLB size was fixed at 256 entries. To allow operating systems to utilize more TLB entries in the future, we need to tell firmware how many TLB entries we actually support in the emulation. Firmware then reports this to the operating system via the PDC_CACHE_INFO call. This patch simply does the preparation to allow more TLB entries. Signed-off-by: Helge Deller --- hw/hppa/machine.c | 8 ++++++++ target/hppa/cpu.h | 5 ++++- 2 files changed, 12 insertions(+), 1 deletion(-) -- 2.21.3 diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c index 90aeefe2a4..e9d84d0f03 100644 --- a/hw/hppa/machine.c +++ b/hw/hppa/machine.c @@ -72,6 +72,14 @@ static FWCfgState *create_fw_cfg(MachineState *ms) fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version", g_memdup(&val, sizeof(val)), sizeof(val)); + val = cpu_to_le64(HPPA_TLB_ENTRIES); + fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries", + g_memdup(&val, sizeof(val)), sizeof(val)); + + val = cpu_to_le64(HPPA_BTLB_ENTRIES); + fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries", + g_memdup(&val, sizeof(val)), sizeof(val)); + return fw_cfg; } diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 801a4fb1ba..440104dc3c 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -196,9 +196,12 @@ struct CPUHPPAState { target_ureg shadow[7]; /* shadow registers */ /* ??? The number of entries isn't specified by the architecture. */ + #define HPPA_TLB_ENTRIES 256 + #define HPPA_BTLB_ENTRIES 0 + /* ??? Implement a unified itlb/dtlb for the moment. */ /* ??? We should use a more intelligent data structure. */ - hppa_tlb_entry tlb[256]; + hppa_tlb_entry tlb[HPPA_TLB_ENTRIES]; uint32_t tlb_last; };