@@ -159,57 +159,6 @@ static const MemoryRegionOps aspeed_sdmc_ops = {
.valid.max_access_size = 4,
};
-static int ast2400_rambits(AspeedSDMCState *s)
-{
- switch (s->ram_size >> 20) {
- case 64:
- return ASPEED_SDMC_DRAM_64MB;
- case 128:
- return ASPEED_SDMC_DRAM_128MB;
- case 256:
- return ASPEED_SDMC_DRAM_256MB;
- case 512:
- return ASPEED_SDMC_DRAM_512MB;
- default:
- g_assert_not_reached();
- break;
- }
-}
-
-static int ast2500_rambits(AspeedSDMCState *s)
-{
- switch (s->ram_size >> 20) {
- case 128:
- return ASPEED_SDMC_AST2500_128MB;
- case 256:
- return ASPEED_SDMC_AST2500_256MB;
- case 512:
- return ASPEED_SDMC_AST2500_512MB;
- case 1024:
- return ASPEED_SDMC_AST2500_1024MB;
- default:
- g_assert_not_reached();
- break;
- }
-}
-
-static int ast2600_rambits(AspeedSDMCState *s)
-{
- switch (s->ram_size >> 20) {
- case 256:
- return ASPEED_SDMC_AST2600_256MB;
- case 512:
- return ASPEED_SDMC_AST2600_512MB;
- case 1024:
- return ASPEED_SDMC_AST2600_1024MB;
- case 2048:
- return ASPEED_SDMC_AST2600_2048MB;
- default:
- g_assert_not_reached();
- break;
- }
-}
-
static void aspeed_sdmc_reset(DeviceState *dev)
{
AspeedSDMCState *s = ASPEED_SDMC(dev);
@@ -324,10 +273,32 @@ static const TypeInfo aspeed_sdmc_info = {
.abstract = true,
};
+static int aspeed_sdmc_get_ram_bits(AspeedSDMCState *s)
+{
+ AspeedSDMCClass *asc = ASPEED_SDMC_GET_CLASS(s);
+ int i;
+
+ /*
+ * The bitfield value encoding the RAM size is the index of the
+ * possible RAM size array
+ */
+ for (i = 0; asc->valid_ram_sizes[i]; i++) {
+ if (s->ram_size == asc->valid_ram_sizes[i]) {
+ return i;
+ }
+ }
+
+ /*
+ * Invalid RAM sizes should have been excluded when setting the
+ * SoC RAM size.
+ */
+ g_assert_not_reached();
+}
+
static uint32_t aspeed_2400_sdmc_compute_conf(AspeedSDMCState *s, uint32_t data)
{
uint32_t fixed_conf = ASPEED_SDMC_VGA_COMPAT |
- ASPEED_SDMC_DRAM_SIZE(ast2400_rambits(s));
+ ASPEED_SDMC_DRAM_SIZE(aspeed_sdmc_get_ram_bits(s));
/* Make sure readonly bits are kept */
data &= ~ASPEED_SDMC_READONLY_MASK;
@@ -385,7 +356,7 @@ static uint32_t aspeed_2500_sdmc_compute_conf(AspeedSDMCState *s, uint32_t data)
uint32_t fixed_conf = ASPEED_SDMC_HW_VERSION(1) |
ASPEED_SDMC_VGA_APERTURE(ASPEED_SDMC_VGA_64MB) |
ASPEED_SDMC_CACHE_INITIAL_DONE |
- ASPEED_SDMC_DRAM_SIZE(ast2500_rambits(s));
+ ASPEED_SDMC_DRAM_SIZE(aspeed_sdmc_get_ram_bits(s));
/* Make sure readonly bits are kept */
data &= ~ASPEED_SDMC_AST2500_READONLY_MASK;
@@ -451,7 +422,7 @@ static uint32_t aspeed_2600_sdmc_compute_conf(AspeedSDMCState *s, uint32_t data)
{
uint32_t fixed_conf = ASPEED_SDMC_HW_VERSION(3) |
ASPEED_SDMC_VGA_APERTURE(ASPEED_SDMC_VGA_64MB) |
- ASPEED_SDMC_DRAM_SIZE(ast2600_rambits(s));
+ ASPEED_SDMC_DRAM_SIZE(aspeed_sdmc_get_ram_bits(s));
/* Make sure readonly bits are kept (use ast2500 mask) */
data &= ~ASPEED_SDMC_AST2500_READONLY_MASK;
Changes in commit 533eb415df2e ("arm/aspeed: actually check RAM size") introduced a 'valid_ram_sizes' array which can be used to compute the associated bit field value encoding the RAM size. The field is simply the index of the array. Reviewed-by: Joel Stanley <joel@jms.id.au> Message-Id: <20200819100956.2216690-19-clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> --- hw/misc/aspeed_sdmc.c | 79 ++++++++++++++----------------------------- 1 file changed, 25 insertions(+), 54 deletions(-)