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[209.51.188.17]) by mx.google.com with ESMTPS id l9si2447796ybo.194.2020.08.31.09.20.47 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 31 Aug 2020 09:20:47 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=QWjYyzpk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:36774 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kCmY3-0006oL-Dg for patch@linaro.org; Mon, 31 Aug 2020 12:20:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34258) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kCmKo-0005LS-6h for qemu-devel@nongnu.org; Mon, 31 Aug 2020 12:07:06 -0400 Received: from mail-pl1-x62a.google.com ([2607:f8b0:4864:20::62a]:33295) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kCmKm-000644-F2 for qemu-devel@nongnu.org; Mon, 31 Aug 2020 12:07:05 -0400 Received: by mail-pl1-x62a.google.com with SMTP id h2so3257503plr.0 for ; Mon, 31 Aug 2020 09:07:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MvUJVsNPWoeKhWUV8ldYPjhJGjA7j8IztAPyoO2B77I=; b=QWjYyzpkXE546IWmGaBX2ohT/h97DP9toSleezV5UkZsbg1OkyjUL5iERFX0NQCdvA Co+rjX9X06vlGv5dLzUiDJqBlfeyKun8zbzo+wzcMAnpj9YKoqlxAPLcrPVfd+sOymeO 1rl1UtJ5GGjs1vNTn8Ci5LbY9sXY4sBaZbbSjKgQpUgGFwNOzFBMMoPXurTdyjpJ1+9L kJ1k4d4kH79sTdp1KzeEISbSPW/NE5mPaeqVCOwDSa7ooXCTWHERR4iGEkog/rh/sMv0 XfU5bdCgXxpaecAh7w9SZzaaI4dr01mLjTmiQZ5YO42UcqdaFlGij6hfarNPsyiYsSDe jWJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MvUJVsNPWoeKhWUV8ldYPjhJGjA7j8IztAPyoO2B77I=; b=AxFwuLXpZrRIjx6tsoCaScUTNw06P3uP8iIIpV41kafwkQsvshCuIqOrp3NOGO2Yz9 ehV+UJJ2FmpeEPP4nHHVTXkGD+nthtlwY50RfmyLVRiHOeBPxAxG30k63pi4dYsHenWH im9676vrbkb3mZdhQd/eNCXg/JFfVeXsJddIFhYAz07EIYqQkMfNbKox9fty1onKioWR sRBjuHrdBQyC2/iNR8VTaIv25sZ87aSCDfLf1u4zFX3B2wWteeU4ZNw9II1i8bVaAtOM SjcZ1ZMIt6ta+/F/ssz+qUIfOo5GGDi2rOQ4S5SjrCj8jF9MgNjWZPHS3jcBkzgvc8y3 QHdQ== X-Gm-Message-State: AOAM533hDTyOKTPn8SV1UXQXASBuubd1oHqA28i22evX8mNP0hfGo96g Vv+yDUeHJZeXotc/tRHCDAblusYNmBqy+w== X-Received: by 2002:a17:90a:d496:: with SMTP id s22mr61847pju.167.1598890022534; Mon, 31 Aug 2020 09:07:02 -0700 (PDT) Received: from localhost.localdomain ([71.212.141.89]) by smtp.gmail.com with ESMTPSA id gt13sm17218pjb.43.2020.08.31.09.07.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Aug 2020 09:07:01 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 43/76] target/microblaze: Unwind properly when raising divide-by-zero Date: Mon, 31 Aug 2020 09:05:28 -0700 Message-Id: <20200831160601.833692-44-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200831160601.833692-1-richard.henderson@linaro.org> References: <20200831160601.833692-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E . Iglesias" , peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Restore the correct pc when raising divide-by-zero. Also, the MSR[DZO] bit is sticky -- it is not cleared with a successful divide. Tested-by: Edgar E. Iglesias Reviewed-by: Edgar E. Iglesias Signed-off-by: Richard Henderson --- target/microblaze/helper.h | 4 ++-- target/microblaze/op_helper.c | 23 ++++++++++++----------- 2 files changed, 14 insertions(+), 13 deletions(-) -- 2.25.1 diff --git a/target/microblaze/helper.h b/target/microblaze/helper.h index 6f7f96421f..79e1e8ecc7 100644 --- a/target/microblaze/helper.h +++ b/target/microblaze/helper.h @@ -1,7 +1,7 @@ DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, i32) -DEF_HELPER_3(divs, i32, env, i32, i32) -DEF_HELPER_3(divu, i32, env, i32, i32) +DEF_HELPER_FLAGS_3(divs, TCG_CALL_NO_WG, i32, env, i32, i32) +DEF_HELPER_FLAGS_3(divu, TCG_CALL_NO_WG, i32, env, i32, i32) DEF_HELPER_3(fadd, i32, env, i32, i32) DEF_HELPER_3(frsub, i32, env, i32, i32) diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c index f976d112eb..d99d98051a 100644 --- a/target/microblaze/op_helper.c +++ b/target/microblaze/op_helper.c @@ -69,26 +69,27 @@ void helper_raise_exception(CPUMBState *env, uint32_t index) cpu_loop_exit(cs); } -static inline int div_prepare(CPUMBState *env, uint32_t a, uint32_t b) +static bool check_divz(CPUMBState *env, uint32_t a, uint32_t b, uintptr_t ra) { - MicroBlazeCPU *cpu = env_archcpu(env); - - if (b == 0) { + if (unlikely(b == 0)) { env->msr |= MSR_DZ; - if ((env->msr & MSR_EE) && cpu->cfg.div_zero_exception) { + if ((env->msr & MSR_EE) && + env_archcpu(env)->cfg.div_zero_exception) { + CPUState *cs = env_cpu(env); + env->esr = ESR_EC_DIVZERO; - helper_raise_exception(env, EXCP_HW_EXCP); + cs->exception_index = EXCP_HW_EXCP; + cpu_loop_exit_restore(cs, ra); } - return 0; + return false; } - env->msr &= ~MSR_DZ; - return 1; + return true; } uint32_t helper_divs(CPUMBState *env, uint32_t a, uint32_t b) { - if (!div_prepare(env, a, b)) { + if (!check_divz(env, a, b, GETPC())) { return 0; } return (int32_t)a / (int32_t)b; @@ -96,7 +97,7 @@ uint32_t helper_divs(CPUMBState *env, uint32_t a, uint32_t b) uint32_t helper_divu(CPUMBState *env, uint32_t a, uint32_t b) { - if (!div_prepare(env, a, b)) { + if (!check_divz(env, a, b, GETPC())) { return 0; } return a / b;