From patchwork Fri Aug 28 14:19:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 248573 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp1146572ilg; Fri, 28 Aug 2020 07:49:08 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzuzFpbpNeVwrkuXQ63Iv1tBwsy8QiLV1WVfuEIe/jXc6wklQhZbU+3eENJKqrlaaRgXMcQ X-Received: by 2002:a25:fc2:: with SMTP id 185mr2884772ybp.96.1598626148440; Fri, 28 Aug 2020 07:49:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1598626148; cv=none; d=google.com; s=arc-20160816; b=iPsDme2h4pxroU6ax/SE8vVtqjUtm77apzrbSBBB0c3GQgHg5E3IRnIwnvFNbdk2v1 h2L+l27DBaxdujHIqq7+A2FcrXjDpzMOSwM/iVzsWRJAiPG32xGjfQrK6p+CNAKSP8Dh 4g/hjeqGkxeIx0yb/jDrcM3HGWY2BeRZqJ6obiJSvS4//9eCSD+8v7vggVwENuczA4Xv xTisngrqSnLd8ytjkVCn4NA9ZNxNBoEBSU6khH/eZ6nh6N0a0mY+cg+O8Nuk/73gdDcE FSrRKxTPRYbAt8UpgckwFcImgNjnNmafrKHcPo0bd0CwkF4P3tH7g9SwqnjfknIE7pCg U2PA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=rirlJSos3h79Rb+snbKGxGEeQw6jeW6C2yeYS1BJjIc=; b=g1dCP/DMx/3EoTgx0w8z2B/EQm1ozaa7e9Vw4FvDGlfpkIPmhjksJTfCOT71mziUHC w9ZRH3FgPC4B5Rb+PqV133wXV1h3BzbuAfrB2KeFx3XlxZWS6qXIT3CR80cjNAG3r8aK mkdO17kmml4Mdcbxcv5OtlJ7tSWPdlWXg3djxQxbBGIsyFgk8Yoh4BYiJX4TvPv24gIL 8sCXSkaFhU8YxhqmGANQ/q94FsnWBo4UygT4L94Rih6AtTOsIQTeWtfRjZUS9r+XkQgZ Sh1lXh5m8aQXlgZyr1XcX/KHmf1MKtNyCJSZKqeHDIXQJpTbntmPK80cq+pPBRJwWwXj 7gpw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Kjh4Ja3g; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d73si1166041ybh.215.2020.08.28.07.49.08 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 28 Aug 2020 07:49:08 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Kjh4Ja3g; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:47108 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kBfgh-0006SY-SW for patch@linaro.org; Fri, 28 Aug 2020 10:49:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52114) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kBfFY-0002WZ-7o for qemu-devel@nongnu.org; Fri, 28 Aug 2020 10:21:04 -0400 Received: from mail-pf1-x443.google.com ([2607:f8b0:4864:20::443]:42421) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kBfFW-0005Rr-8P for qemu-devel@nongnu.org; Fri, 28 Aug 2020 10:21:03 -0400 Received: by mail-pf1-x443.google.com with SMTP id 17so731250pfw.9 for ; Fri, 28 Aug 2020 07:21:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rirlJSos3h79Rb+snbKGxGEeQw6jeW6C2yeYS1BJjIc=; b=Kjh4Ja3gC0OATaMCFPoAieABq3mK+KSnOGMsLhv7ihvCclYN3pKtuL7Wo/nO9jbId8 OMSE9OnnINS3fsDDKihG8VkeJ21puZUixwyQROQAPRXtUKixrxlazQkVgMBaMNfeRIug CbtUwqbZC5vLPQNpNnwQJew82wksy6vKpVjGh77G6wHy7oViTR333NGniplBCTbzPk1+ B8rfQj0nlUN6Twmi5W2lJkmlNC2gd/6fOQ1497Q+rsQhQi455SIIwSzeg8ZOiQwkMn8B 3VNw/Vtazpu0usmzsMzS8XPAQEG890NWzABrXr4gV30GnsJO3YtOPNu+2epqE5EWzj6j dINw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rirlJSos3h79Rb+snbKGxGEeQw6jeW6C2yeYS1BJjIc=; b=oZvi/8IcvzCjGyBPe5xyDWXFgHKmUI62FcIoc5cS0E3AxdOXjOAuR+f6wCIeiyyu9V MSu7gdBCcZYse7iw5CcogtYJ4PI+0CVD8zV+kIGuG3ADtQyOQ0MZ4FK04zb7Li6r1hgJ b9yQI8n0nReR2ZU6tswQq+G9fkEsjhVeAPTX8KxL0Mehv0FRJJtUZUgYjV8vU8dH80jQ NNVWMfc54BcSn3mVyqf7z5C6PZA7RZLgApiTVOC9NuF6FaCBbhwAfqoofUWYKjJApft8 eyuxPPqEds3oy9Q/qAcqmIhfKYcRNYHEb3h5yir4yhbWP+zhjrhRWkMgrOborfcU+5BB DxNQ== X-Gm-Message-State: AOAM5319HShurAAx8A8/PKYMXoCBzfXWeTrlz2/vkd7m5eRl0aYiuz74 vhgKHG0fDfZF7sKYLFadKPRtQ7vp2BpdGw== X-Received: by 2002:a62:4c7:: with SMTP id 190mr1473525pfe.103.1598624460493; Fri, 28 Aug 2020 07:21:00 -0700 (PDT) Received: from localhost.localdomain ([71.212.141.89]) by smtp.gmail.com with ESMTPSA id j3sm1403080pjw.23.2020.08.28.07.20.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Aug 2020 07:20:59 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 70/76] target/microblaze: Convert msrclr, msrset to decodetree Date: Fri, 28 Aug 2020 07:19:23 -0700 Message-Id: <20200828141929.77854-71-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200828141929.77854-1-richard.henderson@linaro.org> References: <20200828141929.77854-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::443; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x443.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Split this out of dec_msr. Signed-off-by: Richard Henderson --- target/microblaze/insns.decode | 6 +++ target/microblaze/translate.c | 85 +++++++++++++++++++--------------- 2 files changed, 54 insertions(+), 37 deletions(-) -- 2.25.1 diff --git a/target/microblaze/insns.decode b/target/microblaze/insns.decode index 8906058a29..ed3312982f 100644 --- a/target/microblaze/insns.decode +++ b/target/microblaze/insns.decode @@ -24,6 +24,7 @@ &typeb rd ra imm &typeb_br rd imm &typeb_bc ra imm +&type_msr rd imm # Include any IMM prefix in the value reported. %extimm 0:s16 !function=typeb_imm @@ -55,6 +56,8 @@ %ieimm 6:5 0:5 @typeb_ie ...... rd:5 ra:5 ..... ..... . ..... &typeb imm=%ieimm +@type_msr ...... rd:5 ...... imm:15 &type_msr + ### { @@ -179,6 +182,9 @@ lwi 111010 ..... ..... ................ @typeb mbar 101110 imm:5 00010 0000 0000 0000 0100 +msrclr 100101 ..... 100010 ............... @type_msr +msrset 100101 ..... 100000 ............... @type_msr + mul 010000 ..... ..... ..... 000 0000 0000 @typea mulh 010000 ..... ..... ..... 000 0000 0001 @typea mulhu 010000 ..... ..... ..... 000 0000 0011 @typea diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 0872795038..9479dbc103 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -1311,16 +1311,61 @@ static void msr_write(DisasContext *dc, TCGv_i32 v) tcg_gen_andi_i32(cpu_msr, v, ~(MSR_C | MSR_CC | MSR_PVR)); } +static bool do_msrclrset(DisasContext *dc, arg_type_msr *arg, bool set) +{ + uint32_t imm = arg->imm; + + if (trap_userspace(dc, imm != MSR_C)) { + return true; + } + + if (arg->rd) { + msr_read(dc, cpu_R[arg->rd]); + } + + /* + * Handle the carry bit separately. + * This is the only bit that userspace can modify. + */ + if (imm & MSR_C) { + tcg_gen_movi_i32(cpu_msr_c, set); + } + + /* + * MSR_C and MSR_CC set above. + * MSR_PVR is not writable, and is always clear. + */ + imm &= ~(MSR_C | MSR_CC | MSR_PVR); + + if (imm != 0) { + if (set) { + tcg_gen_ori_i32(cpu_msr, cpu_msr, imm); + } else { + tcg_gen_andi_i32(cpu_msr, cpu_msr, ~imm); + } + dc->cpustate_changed = 1; + } + return true; +} + +static bool trans_msrclr(DisasContext *dc, arg_type_msr *arg) +{ + return do_msrclrset(dc, arg, false); +} + +static bool trans_msrset(DisasContext *dc, arg_type_msr *arg) +{ + return do_msrclrset(dc, arg, true); +} + static void dec_msr(DisasContext *dc) { CPUState *cs = CPU(dc->cpu); - TCGv_i32 t0, t1; unsigned int sr, rn; - bool to, clrset, extended = false; + bool to, extended = false; sr = extract32(dc->imm, 0, 14); to = extract32(dc->imm, 14, 1); - clrset = extract32(dc->imm, 15, 1) == 0; dc->type_b = 1; if (to) { dc->cpustate_changed = 1; @@ -1334,40 +1379,6 @@ static void dec_msr(DisasContext *dc) extended = extract32(dc->imm, e_bit[to], 1); } - /* msrclr and msrset. */ - if (clrset) { - bool clr = extract32(dc->ir, 16, 1); - - if (!dc->cpu->cfg.use_msr_instr) { - /* nop??? */ - return; - } - - if (trap_userspace(dc, dc->imm != 4 && dc->imm != 0)) { - return; - } - - if (dc->rd) - msr_read(dc, cpu_R[dc->rd]); - - t0 = tcg_temp_new_i32(); - t1 = tcg_temp_new_i32(); - msr_read(dc, t0); - tcg_gen_mov_i32(t1, *(dec_alu_op_b(dc))); - - if (clr) { - tcg_gen_not_i32(t1, t1); - tcg_gen_and_i32(t0, t0, t1); - } else - tcg_gen_or_i32(t0, t0, t1); - msr_write(dc, t0); - tcg_temp_free_i32(t0); - tcg_temp_free_i32(t1); - tcg_gen_movi_i32(cpu_pc, dc->base.pc_next + 4); - dc->base.is_jmp = DISAS_UPDATE; - return; - } - if (trap_userspace(dc, to)) { return; }