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[209.51.188.17]) by mx.google.com with ESMTPS id g2si1084461ybh.383.2020.08.28.07.52.49 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 28 Aug 2020 07:52:49 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IzIYlYe9; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:36108 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kBfkH-00051Z-7K for patch@linaro.org; Fri, 28 Aug 2020 10:52:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:51872) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kBfFM-00020B-7u for qemu-devel@nongnu.org; Fri, 28 Aug 2020 10:20:52 -0400 Received: from mail-pl1-x641.google.com ([2607:f8b0:4864:20::641]:37206) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kBfFK-0005PM-G5 for qemu-devel@nongnu.org; Fri, 28 Aug 2020 10:20:51 -0400 Received: by mail-pl1-x641.google.com with SMTP id c15so533250plq.4 for ; Fri, 28 Aug 2020 07:20:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NBFrP1+/jgZ0aFs6sSu+fBXeEHUysvclKSZS577gabk=; b=IzIYlYe9WJW40VnuC+eVYCy60hCic28Lw06mAUzM4bXKmsCVMDMaLSFPWvco9jvXML SgtnGbBdOq1X8Oof/cDKl2gO0GN9TJ2/M9RkMmKFl3+Z6fEhVuwYjp5vFPefalizkrmk pbGr7aGiIqFhOGbCouThQoKbL9NABJE5SyJqF/YnwZbPy/3mH96Ju2IbBGcAwh3rdiuH MOAsig5MYrZwFqmdPoeYqtFkP3cchqy53XYASi5J37Ofi+6kyPAHiLE2RdzRzRmeIanx BnRMlh9+dItDasFzNnDTXLW56sbHtfcFB520T9eG481QnJp73/w1F1QcsG+njNna1idK GqDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NBFrP1+/jgZ0aFs6sSu+fBXeEHUysvclKSZS577gabk=; b=GoH4OGQOCmprArc+tFyfPqpZnezqpandZ4nNnBQex0q1OiRXXE5XtQiS3+JzJLz0bH dVPKPXSpl9b8vJ1WTIJWUCntmp9scQRF7kbYROaTuYOSjLND7hKQzlwRNm3GD3BbNyuF UfK+OAPoobpkRx5pyOUN6MGH/pJ+0mUky5wPx3Wa5FIwzryFCvLDG5sB82A+WaIaT7Ps QOfMWwzRqXrrNxVpHcfuu+pbsk7FOf2KuXyQ1Kc5DL/HbCp61s8KUruuJZHvAPXdMcBn OD1E1dkQ8PvRwx0nppFP2swxbVemX+AROBx7vEgZpaXYqSkgVYioNBdvZJzyMXxT2rug UlPw== X-Gm-Message-State: AOAM5335zFL9XYwWXtgTP/rJGpUBNsZIScqXMy3i6S3zyrcbmcEZy6y4 jSL0elF2jD4udk8EFXqBsvV+6lwm5+7pjA== X-Received: by 2002:a17:902:6a8b:: with SMTP id n11mr1502705plk.75.1598624448860; Fri, 28 Aug 2020 07:20:48 -0700 (PDT) Received: from localhost.localdomain ([71.212.141.89]) by smtp.gmail.com with ESMTPSA id j3sm1403080pjw.23.2020.08.28.07.20.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Aug 2020 07:20:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 61/76] target/microblaze: Replace delayed_branch with tb_flags_to_set Date: Fri, 28 Aug 2020 07:19:14 -0700 Message-Id: <20200828141929.77854-62-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200828141929.77854-1-richard.henderson@linaro.org> References: <20200828141929.77854-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::641; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x641.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The multi-stage counter can be replaced by clearing D_FLAG, the or'ing in tb_flags_to_set. The jump then happens when D_FLAG is finally cleared. Signed-off-by: Richard Henderson --- target/microblaze/translate.c | 17 +++++------------ 1 file changed, 5 insertions(+), 12 deletions(-) -- 2.25.1 diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index c0b586f467..811c92d23b 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -73,7 +73,6 @@ typedef struct DisasContext { uint16_t imm; unsigned int cpustate_changed; - unsigned int delayed_branch; unsigned int tb_flags; unsigned int tb_flags_to_set; int mem_index; @@ -1328,10 +1327,9 @@ static void eval_cond_jmp(DisasContext *dc, TCGv_i32 pc_true, TCGv_i32 pc_false) static void dec_setup_dslot(DisasContext *dc) { - dc->delayed_branch = 2; - dc->tb_flags |= D_FLAG; + dc->tb_flags_to_set |= D_FLAG; if (dc->type_b && (dc->tb_flags & IMM_FLAG)) { - dc->tb_flags |= BIMM_FLAG; + dc->tb_flags_to_set |= BIMM_FLAG; } } @@ -1343,7 +1341,6 @@ static void dec_bcc(DisasContext *dc) cc = EXTRACT_FIELD(dc->ir, 21, 23); dslot = dc->ir & (1 << 25); - dc->delayed_branch = 1; if (dslot) { dec_setup_dslot(dc); } @@ -1419,7 +1416,6 @@ static void dec_br(DisasContext *dc) } } - dc->delayed_branch = 1; if (dslot) { dec_setup_dslot(dc); } @@ -1633,8 +1629,7 @@ static void mb_tr_init_disas_context(DisasContextBase *dcb, CPUState *cs) dc->cpu = cpu; dc->tb_flags = dc->base.tb->flags; - dc->delayed_branch = !!(dc->tb_flags & D_FLAG); - dc->jmp = dc->delayed_branch ? JMP_INDIRECT : JMP_NOJMP; + dc->jmp = dc->tb_flags & D_FLAG ? JMP_INDIRECT : JMP_NOJMP; dc->cpustate_changed = 0; dc->abort_at_next_insn = 0; dc->ext_imm = dc->base.tb->cs_base; @@ -1705,11 +1700,11 @@ static void mb_tr_translate_insn(DisasContextBase *dcb, CPUState *cs) tcg_gen_discard_i32(cpu_imm); } - dc->tb_flags &= ~IMM_FLAG; + dc->tb_flags &= ~(IMM_FLAG | BIMM_FLAG | D_FLAG); dc->tb_flags |= dc->tb_flags_to_set; dc->base.pc_next += 4; - if (dc->delayed_branch && --dc->delayed_branch == 0) { + if (dc->jmp != JMP_NOJMP && !(dc->tb_flags & D_FLAG)) { if (dc->tb_flags & DRTI_FLAG) { do_rti(dc); } @@ -1719,8 +1714,6 @@ static void mb_tr_translate_insn(DisasContextBase *dcb, CPUState *cs) if (dc->tb_flags & DRTE_FLAG) { do_rte(dc); } - /* Clear the delay slot flag. */ - dc->tb_flags &= ~D_FLAG; dc->base.is_jmp = DISAS_JUMP; }