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[209.51.188.17]) by mx.google.com with ESMTPS id j188si1136725ybj.477.2020.08.28.07.46.45 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 28 Aug 2020 07:46:45 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dML2YWPG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:40480 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kBfeO-0003mg-Jf for patch@linaro.org; Fri, 28 Aug 2020 10:46:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:51752) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kBfFE-0001gT-UP for qemu-devel@nongnu.org; Fri, 28 Aug 2020 10:20:44 -0400 Received: from mail-pg1-x52d.google.com ([2607:f8b0:4864:20::52d]:39122) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kBfFD-0005LY-2t for qemu-devel@nongnu.org; Fri, 28 Aug 2020 10:20:44 -0400 Received: by mail-pg1-x52d.google.com with SMTP id v15so526369pgh.6 for ; Fri, 28 Aug 2020 07:20:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RISUXOD2AWMs6jP2ZEWVEZMruhXXXQYxncqeH2DRHUM=; b=dML2YWPGGfyZ96nA+IZyV4k8asKs2lC9cWA8MKk5GozgCvzgPF3j4eeTkcJdnkEg// l02WhqmIXytKVqsdqLGMzuoHJgnU+uQewxA2HUvpkuQ380ciUvBuZzdGAqyB6bi22xzA DMQnkqkkjO2WJB+1mpWC9ucMG8XnL7XsRIiredsaIUYkefMnH5XuorPQ74sG/nEbiDV7 4pQAdbazFB6RnCzoBvupFYzuskXX/eNKAqUi4O37Bz/Q+tG54QrvZF1LwHiMAHsw2Dm2 DYF+kbsdxs39W1OZtQLTrJRF8WSsZ9ihcvUgQyi+DHyf6l/PfnJ2XnR/+eLAHwJrpWv0 T2Wg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RISUXOD2AWMs6jP2ZEWVEZMruhXXXQYxncqeH2DRHUM=; b=tMBHT281D/hW+/L0hmBqZyBrnQB2uT7kgDP8hcm6D3LLpLBOGTzlpwQ3v/kPG9EHWr 6yvcfeh/wfWWoa0O27Y/AY3oasMaIN3tih7ELKlKqc98glsZx96Q4MDaRCHmHcl+s1DR FMWIA9mQfx0CXuFl84K5dW2mBpcLJqjrCdw/Z4/7HBTeYgzFJemQXZ1KLbC1X0bnprUX zT7YkTUZuksve2zFaeJgFakDe31Z5fm32oMFFMCL2SRkzOe85UOhtFfwY7qatqwZDmRg JG4Yjl+JaeA2LwcjpP2hzOeQ43FAk+bjagLUXyeK7A75+eFfYLYewM28h5OrkzHGQYJQ 4fTQ== X-Gm-Message-State: AOAM531Lov0JjkHvrFeEP7cuUi/GFguVaTcCftsfAB1kZ3EHyxZQQ0am sj649wqNetRCzlHjSDLgDFBybRqFiiXADA== X-Received: by 2002:a63:3841:: with SMTP id h1mr1370545pgn.38.1598624441344; Fri, 28 Aug 2020 07:20:41 -0700 (PDT) Received: from localhost.localdomain ([71.212.141.89]) by smtp.gmail.com with ESMTPSA id j3sm1403080pjw.23.2020.08.28.07.20.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Aug 2020 07:20:40 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 55/76] target/microblaze: Move bimm to BIMM_FLAG Date: Fri, 28 Aug 2020 07:19:08 -0700 Message-Id: <20200828141929.77854-56-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200828141929.77854-1-richard.henderson@linaro.org> References: <20200828141929.77854-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52d; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52d.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" It makes sense to keep BIMM with D_FLAG, as they can be written back to iflags at the same time. BIMM_FLAG does not need to be added to IFLAGS_TB_MASK because it does not affect the next TB, only the exception path out of the current TB. Renumber IMM_FLAG, as the value 4 holds no particular significance; pack these two flags at the bottom of the bitfield. Signed-off-by: Richard Henderson --- target/microblaze/cpu.h | 4 ++-- target/microblaze/helper.c | 2 +- target/microblaze/translate.c | 12 +++++------- 3 files changed, 8 insertions(+), 10 deletions(-) -- 2.25.1 diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 2fc7cf26f1..a5df1fa28f 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -231,7 +231,6 @@ typedef struct CPUMBState CPUMBState; struct CPUMBState { uint32_t btaken; uint32_t btarget; - uint32_t bimm; uint32_t imm; uint32_t regs[32]; @@ -253,7 +252,8 @@ struct CPUMBState { uint32_t res_val; /* Internal flags. */ -#define IMM_FLAG 4 +#define IMM_FLAG (1 << 0) +#define BIMM_FLAG (1 << 1) /* MSR_EE (1 << 8) */ /* MSR_UM (1 << 11) */ /* MSR_VM (1 << 13) */ diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c index f8e2ca12a9..06f4322e09 100644 --- a/target/microblaze/helper.c +++ b/target/microblaze/helper.c @@ -166,7 +166,7 @@ void mb_cpu_do_interrupt(CPUState *cs) /* Reexecute the branch. */ env->regs[17] -= 4; /* was the branch immprefixed?. */ - if (env->bimm) { + if (env->iflags & BIMM_FLAG) { env->regs[17] -= 4; log_cpu_state_mask(CPU_LOG_INT, cs, 0); } diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index d2baa7db0e..97a436c8d5 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -1351,13 +1351,11 @@ static void eval_cond_jmp(DisasContext *dc, TCGv_i32 pc_true, TCGv_i32 pc_false) static void dec_setup_dslot(DisasContext *dc) { - TCGv_i32 tmp = tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)); - - dc->delayed_branch = 2; - dc->tb_flags |= D_FLAG; - - tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUMBState, bimm)); - tcg_temp_free_i32(tmp); + dc->delayed_branch = 2; + dc->tb_flags |= D_FLAG; + if (dc->type_b && (dc->tb_flags & IMM_FLAG)) { + dc->tb_flags |= BIMM_FLAG; + } } static void dec_bcc(DisasContext *dc)