diff mbox series

[v2,50/76] target/microblaze: Replace MSR_EE_FLAG with MSR_EE

Message ID 20200828141929.77854-51-richard.henderson@linaro.org
State Superseded
Headers show
Series target/microblaze improvements | expand

Commit Message

Richard Henderson Aug. 28, 2020, 2:19 p.m. UTC 
There's no reason to define MSR_EE_FLAG; we can just use the
original MSR_EE define.  Document the other flags copied into
tb_flags with iflag to reserve those bits.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/microblaze/cpu.h       | 4 +++-
 target/microblaze/translate.c | 4 ++--
 2 files changed, 5 insertions(+), 3 deletions(-)

-- 
2.25.1

Comments

Philippe Mathieu-Daudé Aug. 31, 2020, 9:09 p.m. UTC | #1 
Le ven. 28 août 2020 16:42, Richard Henderson <richard.henderson@linaro.org>
a écrit :

> There's no reason to define MSR_EE_FLAG; we can just use the

> original MSR_EE define.  Document the other flags copied into

> tb_flags with iflag to reserve those bits.

>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

>


Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


---
>  target/microblaze/cpu.h       | 4 +++-

>  target/microblaze/translate.c | 4 ++--

>  2 files changed, 5 insertions(+), 3 deletions(-)

>

> diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h

> index 013858b8e0..594501e4e7 100644

> --- a/target/microblaze/cpu.h

> +++ b/target/microblaze/cpu.h

> @@ -254,7 +254,9 @@ struct CPUMBState {

>

>      /* Internal flags.  */

>  #define IMM_FLAG       4

> -#define MSR_EE_FLAG     (1 << 8)

> +/* MSR_EE               (1 << 8)  */

> +/* MSR_UM               (1 << 11) */

> +/* MSR_VM               (1 << 13) */

>  #define DRTI_FLAG      (1 << 16)

>  #define DRTE_FLAG      (1 << 17)

>  #define DRTB_FLAG      (1 << 18)

> diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c

> index 72541905ec..1f6731e0af 100644

> --- a/target/microblaze/translate.c

> +++ b/target/microblaze/translate.c

> @@ -162,7 +162,7 @@ static void gen_goto_tb(DisasContext *dc, int n,

> target_ulong dest)

>   */

>  static bool trap_illegal(DisasContext *dc, bool cond)

>  {

> -    if (cond && (dc->tb_flags & MSR_EE_FLAG)

> +    if (cond && (dc->tb_flags & MSR_EE)

>          && dc->cpu->cfg.illegal_opcode_exception) {

>          gen_raise_hw_excp(dc, ESR_EC_ILLEGAL_OP);

>      }

> @@ -178,7 +178,7 @@ static bool trap_userspace(DisasContext *dc, bool cond)

>      int mem_index = cpu_mmu_index(&dc->cpu->env, false);

>      bool cond_user = cond && mem_index == MMU_USER_IDX;

>

> -    if (cond_user && (dc->tb_flags & MSR_EE_FLAG)) {

> +    if (cond_user && (dc->tb_flags & MSR_EE)) {

>          gen_raise_hw_excp(dc, ESR_EC_PRIVINSN);

>      }

>      return cond_user;

> --

> 2.25.1

>

>

>
<div dir="auto"><div><br><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">Le ven. 28 août 2020 16:42, Richard Henderson &lt;<a href="mailto:richard.henderson@linaro.org">richard.henderson@linaro.org</a>&gt; a écrit :<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">There&#39;s no reason to define MSR_EE_FLAG; we can just use the<br>
original MSR_EE define.  Document the other flags copied into<br>
tb_flags with iflag to reserve those bits.<br>
<br>
Signed-off-by: Richard Henderson &lt;<a href="mailto:richard.henderson@linaro.org" target="_blank" rel="noreferrer">richard.henderson@linaro.org</a>&gt;<br></blockquote></div></div><div dir="auto"><br></div><div dir="auto"><span style="font-family:sans-serif;font-size:13.696px">Reviewed-by: Philippe Mathieu-Daudé &lt;</span><a href="mailto:f4bug@amsat.org" style="text-decoration:none;color:rgb(66,133,244);font-family:sans-serif;font-size:13.696px">f4bug@amsat.org</a><span style="font-family:sans-serif;font-size:13.696px">&gt;</span><br></div><div dir="auto"><br></div><div dir="auto"><div class="gmail_quote"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">

---<br>
 target/microblaze/cpu.h       | 4 +++-<br>
 target/microblaze/translate.c | 4 ++--<br>
 2 files changed, 5 insertions(+), 3 deletions(-)<br>
<br>
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h<br>
index 013858b8e0..594501e4e7 100644<br>
--- a/target/microblaze/cpu.h<br>
+++ b/target/microblaze/cpu.h<br>
@@ -254,7 +254,9 @@ struct CPUMBState {<br>
<br>
     /* Internal flags.  */<br>
 #define IMM_FLAG       4<br>
-#define MSR_EE_FLAG     (1 &lt;&lt; 8)<br>
+/* MSR_EE               (1 &lt;&lt; 8)  */<br>
+/* MSR_UM               (1 &lt;&lt; 11) */<br>
+/* MSR_VM               (1 &lt;&lt; 13) */<br>
 #define DRTI_FLAG      (1 &lt;&lt; 16)<br>
 #define DRTE_FLAG      (1 &lt;&lt; 17)<br>
 #define DRTB_FLAG      (1 &lt;&lt; 18)<br>
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c<br>
index 72541905ec..1f6731e0af 100644<br>
--- a/target/microblaze/translate.c<br>
+++ b/target/microblaze/translate.c<br>
@@ -162,7 +162,7 @@ static void gen_goto_tb(DisasContext *dc, int n, target_ulong dest)<br>
  */<br>
 static bool trap_illegal(DisasContext *dc, bool cond)<br>
 {<br>
-    if (cond &amp;&amp; (dc-&gt;tb_flags &amp; MSR_EE_FLAG)<br>
+    if (cond &amp;&amp; (dc-&gt;tb_flags &amp; MSR_EE)<br>
         &amp;&amp; dc-&gt;cpu-&gt;cfg.illegal_opcode_exception) {<br>
         gen_raise_hw_excp(dc, ESR_EC_ILLEGAL_OP);<br>
     }<br>
@@ -178,7 +178,7 @@ static bool trap_userspace(DisasContext *dc, bool cond)<br>
     int mem_index = cpu_mmu_index(&amp;dc-&gt;cpu-&gt;env, false);<br>
     bool cond_user = cond &amp;&amp; mem_index == MMU_USER_IDX;<br>
<br>
-    if (cond_user &amp;&amp; (dc-&gt;tb_flags &amp; MSR_EE_FLAG)) {<br>
+    if (cond_user &amp;&amp; (dc-&gt;tb_flags &amp; MSR_EE)) {<br>
         gen_raise_hw_excp(dc, ESR_EC_PRIVINSN);<br>
     }<br>
     return cond_user;<br>
-- <br>
2.25.1<br>
<br>
<br>
</blockquote></div></div></div>
diff mbox series

Patch

diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 013858b8e0..594501e4e7 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -254,7 +254,9 @@  struct CPUMBState {
 
     /* Internal flags.  */
 #define IMM_FLAG	4
-#define MSR_EE_FLAG     (1 << 8)
+/* MSR_EE               (1 << 8)  */
+/* MSR_UM               (1 << 11) */
+/* MSR_VM               (1 << 13) */
 #define DRTI_FLAG	(1 << 16)
 #define DRTE_FLAG	(1 << 17)
 #define DRTB_FLAG	(1 << 18)
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 72541905ec..1f6731e0af 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -162,7 +162,7 @@  static void gen_goto_tb(DisasContext *dc, int n, target_ulong dest)
  */
 static bool trap_illegal(DisasContext *dc, bool cond)
 {
-    if (cond && (dc->tb_flags & MSR_EE_FLAG)
+    if (cond && (dc->tb_flags & MSR_EE)
         && dc->cpu->cfg.illegal_opcode_exception) {
         gen_raise_hw_excp(dc, ESR_EC_ILLEGAL_OP);
     }
@@ -178,7 +178,7 @@  static bool trap_userspace(DisasContext *dc, bool cond)
     int mem_index = cpu_mmu_index(&dc->cpu->env, false);
     bool cond_user = cond && mem_index == MMU_USER_IDX;
 
-    if (cond_user && (dc->tb_flags & MSR_EE_FLAG)) {
+    if (cond_user && (dc->tb_flags & MSR_EE)) {
         gen_raise_hw_excp(dc, ESR_EC_PRIVINSN);
     }
     return cond_user;