From patchwork Fri Jun 5 04:17:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 187483 Delivered-To: patch@linaro.org Received: by 2002:a92:cf06:0:0:0:0:0 with SMTP id c6csp2026278ilo; Thu, 4 Jun 2020 21:22:08 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzEFqLOpxnfVOlvDakpZsl3X0H95807VSOyTK9WpRalwQFhpzowHb2HZcna2f135lFPL/pC X-Received: by 2002:a25:f413:: with SMTP id q19mr13682166ybd.178.1591330928302; Thu, 04 Jun 2020 21:22:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1591330928; cv=none; d=google.com; s=arc-20160816; b=o6pnikrdK09mVK8/nTVk/DmITvwDilxEj+tO3CHtfjl5doVSv8nspBtIshhfI9zB4E gpwKw3P1OpVVtMZmABWx75RHSr9uYlWl8G9EvYQO5UkjRYoVXSEBCaOi4vd0XYET6gau ntFLgJsQmu0oTrkAJDJQbd7kzdZtQLEnTT7oOhga65+h/pkaS2g4mpUx/5DZnj7maCcR WDaOsEb1iWJuy9grQOxZG+jE4sLagxjSALmmfiKo/uEq9/NxRKIGg20DEfl6blTFuLlx 2D6stKBHrsLG0OzQMjwIB/A5RsJTT/DUJ79ct7jwfMhX16XEug2ruHqx7H8fC7T6pdXr epIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=nCxIirgN5OzmYmJJvTz1Ncldrcyg3LSoeyCRUE7/tl0=; b=x/HZ1AH0dsckuwvOrWHg3wHkJbQ5Mz2nOfgozPLT2xNW/KaFvT+Tg8WHwUKUaNjbDh IAqfoWd+Yr25iJBqSC5DFBGYj8wNSJl7kMbpcRJNMg+VmTvgv20dc9gi438AFAepEPhW KjoXC2xuLu3cBH0MV+JL6Wwtxyp6ByOKo+MLhT29AsvlEEX84Mx5/a08ah+fBFjYqFYr N2Zy1RSXEzMBHsV4tpOY5L4efw20CXVDaITfqd4Xz4ueiU1kTk47UCgtL/OYGvlFMSAL Uoa8NRQcQToo0+NDKcLxTsBN2juN4isV9s/lD4hU3cgEIwxAc8q4a9raOhrEJ5Esg7Vx Uubw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=YxMROiUm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id l15si7918583ybt.337.2020.06.04.21.22.08 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 04 Jun 2020 21:22:08 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=YxMROiUm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:56756 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jh3rr-0004gL-QF for patch@linaro.org; Fri, 05 Jun 2020 00:22:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39514) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jh3nf-0004Uk-Cb for qemu-devel@nongnu.org; Fri, 05 Jun 2020 00:17:47 -0400 Received: from mail-pj1-x1043.google.com ([2607:f8b0:4864:20::1043]:40216) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jh3ne-0000kh-Il for qemu-devel@nongnu.org; Fri, 05 Jun 2020 00:17:47 -0400 Received: by mail-pj1-x1043.google.com with SMTP id s88so2179647pjb.5 for ; Thu, 04 Jun 2020 21:17:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nCxIirgN5OzmYmJJvTz1Ncldrcyg3LSoeyCRUE7/tl0=; b=YxMROiUmSMWoMRilm0Ow7tHnIWiDyjBi33Ml7dfIqbCZtEUDsT+NFO9ubOAnOb0WE3 uBB5vDn6D6ta07XlPURgTyJW7kDEklNuHOr6eYuE7jg7kAbZYBRxGtvuJxRKEC6wRsa1 2Ue0vfJsJXvw1ctA1QOLZDpPztNkwBao6fUlaRzBNJSjj/ruCMXvPZLH6itcx6pu5qko ner6WCZamoZZrIUlVR+FkGMfZXdK3wKzYc2P+/xh888lQsRVawCZ/RrnHsmRHZI/ZtN8 t8WqwqM9ne333TErHpYu+n3naILGXfYnGugrK5UAjjzSEwzcgT0rXCGhSP5UBGbn141p 0OKQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nCxIirgN5OzmYmJJvTz1Ncldrcyg3LSoeyCRUE7/tl0=; b=lJneh+VPJtTeT2m8QMgLW2RzzqeUpRP5AWGtVqSAm0UOaYfNjBXI5nltuFPkCb5O1q +OXB4u/ZsVV3U3ep2qzUONHR9z8pxcN3FEkxQ3Y/Es8hbcsvRVB4qx1H9/67cmyCVupU VmE17bsnb8QaotpHxv03Kv4+4GV7EvtMHPNEWeEbMvK7x9JS4bsxXhwqTCMu5JU2SbiN 4tfXq0dNDhyMkcztBO14Zk6eYAnwWtPWmjXYKaWHq8KQJjGvgewx6eqdaqlKfXZofLYj 17l+oIZDCxXlOlVzqhXQHCfjI5z8Q55m+liP9GftV+39Bro/Hcy21udHprtuRNsI4x75 6Piw== X-Gm-Message-State: AOAM530U/8s7Z0VIKeJ2s2ZlQujMQREAa4mW0EOwntLhMCW0Rb/MnTtd u4fhjmf3vb3u9f1e1fFugh5JaG4Ed+o= X-Received: by 2002:a17:90a:6047:: with SMTP id h7mr738751pjm.145.1591330664883; Thu, 04 Jun 2020 21:17:44 -0700 (PDT) Received: from localhost.localdomain (174-21-143-238.tukw.qwest.net. [174.21.143.238]) by smtp.gmail.com with ESMTPSA id h15sm5440902pgl.12.2020.06.04.21.17.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Jun 2020 21:17:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 08/17] exec: Add support for TARGET_TAGGED_ADDRESSES Date: Thu, 4 Jun 2020 21:17:24 -0700 Message-Id: <20200605041733.415188-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200605041733.415188-1-richard.henderson@linaro.org> References: <20200605041733.415188-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1043; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1043.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, steplong@quicinc.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The AArch64 Linux ABI has always enabled TBI, but has historically required that pointer tags be removed before a syscall. This has changed in the lead-up to ARMv8.5-MTE, in a way that affects the ABI generically and not specifically to MTE. This patch allows the target to indicate that (1) there are tags and (2) whether or not they should be taken into account at the syscall level. Adjust g2h, guest_addr_valid, and guest_range_valid to ignore pointer tags, similar to how TIF_TAGGED_ADDR alters __range_ok in the arm64 kernel source. The prctl syscall is not not yet updated, so this change by itself has no visible effect. Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 22 ++++++++++++++++++---- target/arm/cpu-param.h | 3 +++ bsd-user/main.c | 5 +++++ linux-user/main.c | 5 +++++ 4 files changed, 31 insertions(+), 4 deletions(-) -- 2.25.1 Reviewed-by: Peter Maydell diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 066cf33f70..d84847dc70 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -69,17 +69,31 @@ typedef uint64_t abi_ptr; #define TARGET_ABI_FMT_ptr "%"PRIx64 #endif +#ifdef TARGET_TAGGED_ADDRESSES +extern abi_ptr untagged_addr_mask; +static inline abi_ptr untagged_addr(abi_ptr x) +{ + return x & untagged_addr_mask; +} +#else +static inline abi_ptr untagged_addr(abi_ptr x) { return x; } +#endif + /* All direct uses of g2h and h2g need to go away for usermode softmmu. */ -#define g2h(x) ((void *)((unsigned long)(abi_ptr)(x) + guest_base)) +static inline void *g2h(abi_ptr x) +{ + return (void *)(uintptr_t)(untagged_addr(x) + guest_base); +} static inline bool guest_addr_valid(abi_ptr x) { - return x <= GUEST_ADDR_MAX; + return untagged_addr(x) <= GUEST_ADDR_MAX; } -static inline int guest_range_valid(unsigned long start, unsigned long len) +static inline bool guest_range_valid(abi_ptr start, abi_ulong len) { - return len - 1 <= GUEST_ADDR_MAX && start <= GUEST_ADDR_MAX - len + 1; + return len - 1 <= GUEST_ADDR_MAX && + untagged_addr(start) <= GUEST_ADDR_MAX - len + 1; } #define h2g_valid(x) ((uintptr_t)(x) - guest_base <= GUEST_ADDR_MAX) diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h index 6321385b46..f922aa0650 100644 --- a/target/arm/cpu-param.h +++ b/target/arm/cpu-param.h @@ -20,6 +20,9 @@ #ifdef CONFIG_USER_ONLY #define TARGET_PAGE_BITS 12 +# ifdef TARGET_AARCH64 +# define TARGET_TAGGED_ADDRESSES +# endif #else /* * ARMv7 and later CPUs have 4K pages minimum, but ARMv5 and v6 diff --git a/bsd-user/main.c b/bsd-user/main.c index 0bfe46cff9..87c99fc6c2 100644 --- a/bsd-user/main.c +++ b/bsd-user/main.c @@ -45,6 +45,11 @@ unsigned long guest_base; bool have_guest_base; unsigned long reserved_va; +#ifdef TARGET_TAGGED_ADDRESSES +/* Default to no tagged addresses, i.e. all pointer bits valid. */ +abi_ptr untagged_addr_mask = -1; +#endif + static const char *interp_prefix = CONFIG_QEMU_INTERP_PREFIX; const char *qemu_uname_release; extern char **environ; diff --git a/linux-user/main.c b/linux-user/main.c index 3597e99bb1..8fcca3f5f1 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -103,6 +103,11 @@ static int last_log_mask; unsigned long reserved_va; +#ifdef TARGET_TAGGED_ADDRESSES +/* Default to no tagged addresses, i.e. all pointer bits valid. */ +abi_ptr untagged_addr_mask = -1; +#endif + static void usage(int exitcode); static const char *interp_prefix = CONFIG_QEMU_INTERP_PREFIX;