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[88.21.204.71]) by smtp.gmail.com with ESMTPSA id n25sm1623084edo.56.2020.05.26.06.33.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2020 06:33:08 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PULL 13/14] hw/mips/mips_int: De-duplicate KVM interrupt delivery Date: Tue, 26 May 2020 15:32:46 +0200 Message-Id: <20200526133247.13066-14-f4bug@amsat.org> X-Mailer: git-send-email 2.21.3 In-Reply-To: <20200526133247.13066-1-f4bug@amsat.org> References: <20200526133247.13066-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::531; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ed1-x531.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.001, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Aleksandar Rikalo , libvir-list@redhat.com, Thomas Huth , Jiaxun Yang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Markovic , Huacai Chen , Paolo Bonzini , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Refactor duplicated code in a single place. Reviewed-by: Thomas Huth Message-Id: <20200429082916.10669-2-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/mips_int.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/hw/mips/mips_int.c b/hw/mips/mips_int.c index 796730b11d..4a1bf846da 100644 --- a/hw/mips/mips_int.c +++ b/hw/mips/mips_int.c @@ -47,17 +47,12 @@ static void cpu_mips_irq_request(void *opaque, int irq, int level) if (level) { env->CP0_Cause |= 1 << (irq + CP0Ca_IP); - - if (kvm_enabled() && irq == 2) { - kvm_mips_set_interrupt(cpu, irq, level); - } - } else { env->CP0_Cause &= ~(1 << (irq + CP0Ca_IP)); + } - if (kvm_enabled() && irq == 2) { - kvm_mips_set_interrupt(cpu, irq, level); - } + if (kvm_enabled() && irq == 2) { + kvm_mips_set_interrupt(cpu, irq, level); } if (env->CP0_Cause & CP0Ca_IP_mask) {