From patchwork Wed May 6 18:29:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 186266 Delivered-To: patch@linaro.org Received: by 2002:a92:8d81:0:0:0:0:0 with SMTP id w1csp2407089ill; Wed, 6 May 2020 11:30:50 -0700 (PDT) X-Google-Smtp-Source: APiQypJTot3EFhIzx/AxzOUBFYdxW71pFpC4Z/QZyA+lY8Feik0HOiVRvmTiiSXfmyKe2a/63U/M X-Received: by 2002:ac8:4b4c:: with SMTP id e12mr9917680qts.78.1588789850291; Wed, 06 May 2020 11:30:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1588789850; cv=none; d=google.com; s=arc-20160816; b=OuDJpqAbz8XnCzBOskiWp0K39PlUsdZI0WS+KI/sfVdyyqAmxpVB258/sQCSODKwIM zFN5ywyCtqocqLuAmUDtabg/f4J4d1ub0uesffVmsxEDix2xdMXLaXEazc+qkptAfzir bQk8vxNAiQI/o12/S2fziAo/rix9epIKxHIuVimCgNTjqoiYf9lNLcmfz/MQyOXlaQBF AcpVHpbAhuXoi2VUQH994NbiYeo663VMgAD+oMhfOQgve44bjKan4fp1xvF8PHF5fi6G RpXiEvGLyPJ7L7xbOm1D+zwiI2UdoRM6k+OH6ZVU0m63q2CaTzgVVP7lMzQtt8Bskpr0 tdYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=dOnBBGhmkNTpQUIqTasvNhE2MTWW7gI0dB3WMtwwkiQ=; b=Y14gSkLP6fgiWohHzsaufcbiouigub9th6WIwdf2afpLAiBOA+inoGCuek86OL+KPE KBuBlqCZtiyquPRUjwn/iqTsXviIrZmuap/FCJ6q45OlYFWxZdngzVsDuXYzE8pd8Psb LZnnqcQkruSQ55b9YwJkl3RkSx32dcv14424TNwllvmgGi2XlFio1FVVo1Ho4CjtQd+d kYWPdIVtoWMpxz0Yn/2GUMScdQ7ZkrzDBal5ptZkb6IWCZHZbgLiKXQaWCQP/ZOnGswH OUlgXoCMLCIP1cZwmZG+Ds+G4H6nPiM3zQanZg14EJsjMjcZU+fb751WVoFKRx5/DNgO fL8g== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=tq6brdX7; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:470:142::17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:470:142::17]) by mx.google.com with ESMTPS id b62si1386103qkd.342.2020.05.06.11.30.50 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 06 May 2020 11:30:50 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:470:142::17 as permitted sender) client-ip=2001:470:142::17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=tq6brdX7; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:470:142::17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:49002 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jWOoj-0004NY-Mm for patch@linaro.org; Wed, 06 May 2020 14:30:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60832) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jWOo5-0004Mv-2h for qemu-devel@nongnu.org; Wed, 06 May 2020 14:30:09 -0400 Received: from mail-pf1-x444.google.com ([2607:f8b0:4864:20::444]:36834) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jWOo4-0002nl-2B for qemu-devel@nongnu.org; Wed, 06 May 2020 14:30:08 -0400 Received: by mail-pf1-x444.google.com with SMTP id z1so1435967pfn.3 for ; Wed, 06 May 2020 11:30:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dOnBBGhmkNTpQUIqTasvNhE2MTWW7gI0dB3WMtwwkiQ=; b=tq6brdX7b8W2ZYb1Oi0evlSfSNa2jHfXitgWS+aO0xJI+sg/T92kF9riXQncp8UoF0 urPzxJ9wGEIF+b20w9Zel7GIyeUrzEffA2q3fGVKwl9F02iHSUFlEq8+Dk0b6DgCFfuD axN1seqsAJ4kHP2C6UBnN+RLqW4I1RgplN4n9kU5QyQ9904focMHY6pq0x6TvgGgSPAr PWmfb1ltxBiNPdAILh+lTJTOx8J6N0duFhAUemTEfJim0RrhRb2aiYiym8EKtEAzmshr 9tJKq0FKrfrHfCpyBkGZZaBj4Rj44rL5YKIguUNgwFQWX7NbfxIEi6NVx/hYbd8ZnoTU raQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dOnBBGhmkNTpQUIqTasvNhE2MTWW7gI0dB3WMtwwkiQ=; b=lT/pP5ff/wxGrDyTQpbB31KAe34tsdk2qOQ5OQjVJRL1CGkxgpvMcXn2mf9LfuVBoH DMo18dT9zh5CmfU0mWdftJ1njP9v3dJoKFwhMjmOIPrxr2X94wkR+zdO1o5IKeZLya0y +SLFwJHaBcDZJPMvvAR2veafmGhdD+Tbw5scFTarCGjDSwO2zajVq3dQ9MoC91IlQR2N 1xPul5QRYQEwzo3akcP8Vso6TxT7ksADjZ++DPnjCiZ7vAAIGgGiE+cjJT32tY1YytEY gCMPrOO8AJLkbee2CtuZkGgeaiGv1Hrh4A+c7EECmkrVWivEmPm4Nrb7AggBMgJ2aJ3s ktKw== X-Gm-Message-State: AGi0PuavX/RwbJr2+cXPm9/E+fIkWWL9zxL3HJaPfPezDuBqnSFGJ9jU waoa7UGdE3W6yhRXwqYQpfApcPPaj+A= X-Received: by 2002:a62:14a:: with SMTP id 71mr9065890pfb.33.1588789806243; Wed, 06 May 2020 11:30:06 -0700 (PDT) Received: from localhost.localdomain (174-21-149-226.tukw.qwest.net. [174.21.149.226]) by smtp.gmail.com with ESMTPSA id w11sm2572589pfq.100.2020.05.06.11.30.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 May 2020 11:30:05 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 02/10] target/s390x: Use tcg_gen_gvec_dup_imm Date: Wed, 6 May 2020 11:29:54 -0700 Message-Id: <20200506183002.3192-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200506183002.3192-1-richard.henderson@linaro.org> References: <20200506183002.3192-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::444; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x444.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, =?utf-8?q?Alex_Benn=C3=A9e?= , David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The gen_gvec_dupi switch is unnecessary with the new function. Replace it with a local gen_gvec_dup_imm that takes care of the register to offset conversion and length arguments. Drop zero_vec and use use gen_gvec_dup_imm with 0. Reviewed-by: David Hildenbrand Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/s390x/translate_vx.inc.c | 41 +++++++-------------------------- 1 file changed, 8 insertions(+), 33 deletions(-) -- 2.20.1 diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c index 24558cce80..12347f8a03 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -231,8 +231,8 @@ static void get_vec_element_ptr_i64(TCGv_ptr ptr, uint8_t reg, TCGv_i64 enr, #define gen_gvec_mov(v1, v2) \ tcg_gen_gvec_mov(0, vec_full_reg_offset(v1), vec_full_reg_offset(v2), 16, \ 16) -#define gen_gvec_dup64i(v1, c) \ - tcg_gen_gvec_dup64i(vec_full_reg_offset(v1), 16, 16, c) +#define gen_gvec_dup_imm(es, v1, c) \ + tcg_gen_gvec_dup_imm(es, vec_full_reg_offset(v1), 16, 16, c); #define gen_gvec_fn_2(fn, es, v1, v2) \ tcg_gen_gvec_##fn(es, vec_full_reg_offset(v1), vec_full_reg_offset(v2), \ 16, 16) @@ -316,31 +316,6 @@ static void gen_gvec128_4_i64(gen_gvec128_4_i64_fn fn, uint8_t d, uint8_t a, tcg_temp_free_i64(cl); } -static void gen_gvec_dupi(uint8_t es, uint8_t reg, uint64_t c) -{ - switch (es) { - case ES_8: - tcg_gen_gvec_dup8i(vec_full_reg_offset(reg), 16, 16, c); - break; - case ES_16: - tcg_gen_gvec_dup16i(vec_full_reg_offset(reg), 16, 16, c); - break; - case ES_32: - tcg_gen_gvec_dup32i(vec_full_reg_offset(reg), 16, 16, c); - break; - case ES_64: - gen_gvec_dup64i(reg, c); - break; - default: - g_assert_not_reached(); - } -} - -static void zero_vec(uint8_t reg) -{ - tcg_gen_gvec_dup8i(vec_full_reg_offset(reg), 16, 16, 0); -} - static void gen_addi2_i64(TCGv_i64 dl, TCGv_i64 dh, TCGv_i64 al, TCGv_i64 ah, uint64_t b) { @@ -396,8 +371,8 @@ static DisasJumpType op_vgbm(DisasContext *s, DisasOps *o) * Masks for both 64 bit elements of the vector are the same. * Trust tcg to produce a good constant loading. */ - gen_gvec_dup64i(get_field(s, v1), - generate_byte_mask(i2 & 0xff)); + gen_gvec_dup_imm(ES_64, get_field(s, v1), + generate_byte_mask(i2 & 0xff)); } else { TCGv_i64 t = tcg_temp_new_i64(); @@ -432,7 +407,7 @@ static DisasJumpType op_vgm(DisasContext *s, DisasOps *o) } } - gen_gvec_dupi(es, get_field(s, v1), mask); + gen_gvec_dup_imm(es, get_field(s, v1), mask); return DISAS_NEXT; } @@ -585,7 +560,7 @@ static DisasJumpType op_vllez(DisasContext *s, DisasOps *o) t = tcg_temp_new_i64(); tcg_gen_qemu_ld_i64(t, o->addr1, get_mem_index(s), MO_TE | es); - zero_vec(get_field(s, v1)); + gen_gvec_dup_imm(es, get_field(s, v1), 0); write_vec_element_i64(t, get_field(s, v1), enr, es); tcg_temp_free_i64(t); return DISAS_NEXT; @@ -892,7 +867,7 @@ static DisasJumpType op_vrepi(DisasContext *s, DisasOps *o) return DISAS_NORETURN; } - gen_gvec_dupi(es, get_field(s, v1), data); + gen_gvec_dup_imm(es, get_field(s, v1), data); return DISAS_NEXT; } @@ -1372,7 +1347,7 @@ static DisasJumpType op_vcksm(DisasContext *s, DisasOps *o) read_vec_element_i32(tmp, get_field(s, v2), i, ES_32); tcg_gen_add2_i32(tmp, sum, sum, sum, tmp, tmp); } - zero_vec(get_field(s, v1)); + gen_gvec_dup_imm(ES_32, get_field(s, v1), 0); write_vec_element_i32(sum, get_field(s, v1), 1, ES_32); tcg_temp_free_i32(tmp);