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[209.51.188.17]) by mx.google.com with ESMTPS id f1si206443qto.242.2020.03.16.10.46.19 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 16 Mar 2020 10:46:19 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:44764 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jDtoh-0001vw-Ed for patch@linaro.org; Mon, 16 Mar 2020 13:46:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39974) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jDsPU-0007r1-Sh for qemu-devel@nongnu.org; Mon, 16 Mar 2020 12:16:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jDsPT-0006pI-BQ for qemu-devel@nongnu.org; Mon, 16 Mar 2020 12:16:12 -0400 Received: from mout.kundenserver.de ([212.227.126.133]:49327) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jDsPT-0006eG-1P for qemu-devel@nongnu.org; Mon, 16 Mar 2020 12:16:11 -0400 Received: from localhost.localdomain ([82.252.135.106]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.167]) with ESMTPSA (Nemesis) id 1M7ehh-1jEixU270H-007yRG; Mon, 16 Mar 2020 17:16:05 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Subject: [PULL 03/38] linux-user/i386: Emulate x86_64 vsyscalls Date: Mon, 16 Mar 2020 17:15:15 +0100 Message-Id: <20200316161550.336150-4-laurent@vivier.eu> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200316161550.336150-1-laurent@vivier.eu> References: <20200316161550.336150-1-laurent@vivier.eu> MIME-Version: 1.0 X-Provags-ID: V03:K1:lZvFEJ9o9G68c+XASEUpLXin5vmNZDMT1y+F84scUvakLyBelX9 PNSqCPntBUuGnEvlT19tvz9rpFcgNFe++YuVZzItp8OsJEm53cb+HqVh1bI9NdVeJ4+A19V 8Y4306bYtYU7fs1SmTmr8EjBBvb+xh7f1nmMoitU1kw2M/Bqe5CVkISJwhSLHdormGUkKSb jXHEnwWuwHVAmNDLJj4RQ== X-UI-Out-Filterresults: notjunk:1; V03:K0:wFXAT8xnGt0=:Pofy35ZdiFalCR8u0um57I qnocvwCpIKo4FypFLDoML5diRwuXQ19R4UynuqbwOcdwJFlqV0+iouO7jgOpUdDib60fnMlnw vRepkWT8V1sClLCL5iTP4R2gb7lC+4G2Cz02yYQAoL7N2C5DxGV+oMx4JC1PxG+ZCazPEDK59 g6m8PVFmmVdkcqRNKTG2+3qDrZPLWCnnAuLatBrYbqcghX1JwMlChPYX9HqreF4Atd/Ez2rgP bkplbUEK0ybR41jH71/O/1pisey8iDfUjlhYKw91UCqO3A9psrfo5Y/v+IsJRtlIFTWiVpHq8 uOFinNohgw0z1OArti++JzDUuhb4ISb+tPGjv3aDVcHJEFbhIp3UVf7+zr4ozU0B0UVYtKdnb ygGOIVeaL+tQQ/iCdVYl2gGTMGHti7rN38ZjQeHSolaaDIcKdajQKNVWh+6EuDWwd/pVhMqmY B3bDwFctqqE0QaxyEr5KFxhL3oLzbzbs4MIFnuosLgdj8MtmQ176x0oozJ9l9jSspdJGvMJWG c3aL3cyW1NRgrFWph4NuYkQtyj3QfLhiVWXs/NrOcr6gL2/x9FAv/sricC+OiV6Mn/9BAyORD 4jYLzdSFLrxuGcK5DdXF9S7JOIJgxzEx8MyTpo51ywljPxuP8wfZGkjlX7qD8BUSSsShXcQG9 FAuiRXEej80n4iCOLvtuFgJbO1yyp0Sxj/r9Cspe7mYQsusudfw7PwmnVlNfKMzJn54bVLZsA T+eunW6DA2pV/CKRAeFR8MpuX6U+4hq0sAh3NshjjbVJlUS07TxzsZdzcDeu+ruYs7/ilcyo2 10aZSOhS7e/UCLQDOffSjnp/iU1CqgtdTkqFXC+Ll+s0rtukdFi9WLOCIEHM9Jm7cOpZWvj X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 212.227.126.133 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Riku Voipio , Richard Henderson , Laurent Vivier Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Notice the magic page during translate, much like we already do for the arm32 commpage. At runtime, raise an exception to return cpu_loop for emulation. Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson Message-Id: <20200213032223.14643-4-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier --- linux-user/i386/cpu_loop.c | 108 +++++++++++++++++++++++++++++++++++++ target/i386/cpu.h | 7 +++ target/i386/translate.c | 14 ++++- 3 files changed, 128 insertions(+), 1 deletion(-) -- 2.24.1 diff --git a/linux-user/i386/cpu_loop.c b/linux-user/i386/cpu_loop.c index e217cca5ee1e..70cde417e605 100644 --- a/linux-user/i386/cpu_loop.c +++ b/linux-user/i386/cpu_loop.c @@ -92,6 +92,109 @@ static void gen_signal(CPUX86State *env, int sig, int code, abi_ptr addr) queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); } +#ifdef TARGET_X86_64 +static bool write_ok_or_segv(CPUX86State *env, abi_ptr addr, size_t len) +{ + /* + * For all the vsyscalls, NULL means "don't write anything" not + * "write it at address 0". + */ + if (addr == 0 || access_ok(VERIFY_WRITE, addr, len)) { + return true; + } + + env->error_code = PG_ERROR_W_MASK | PG_ERROR_U_MASK; + gen_signal(env, TARGET_SIGSEGV, TARGET_SEGV_MAPERR, addr); + return false; +} + +/* + * Since v3.1, the kernel traps and emulates the vsyscall page. + * Entry points other than the official generate SIGSEGV. + */ +static void emulate_vsyscall(CPUX86State *env) +{ + int syscall; + abi_ulong ret; + uint64_t caller; + + /* + * Validate the entry point. We have already validated the page + * during translation to get here; now verify the offset. + */ + switch (env->eip & ~TARGET_PAGE_MASK) { + case 0x000: + syscall = TARGET_NR_gettimeofday; + break; + case 0x400: + syscall = TARGET_NR_time; + break; + case 0x800: + syscall = TARGET_NR_getcpu; + break; + default: + goto sigsegv; + } + + /* + * Validate the return address. + * Note that the kernel treats this the same as an invalid entry point. + */ + if (get_user_u64(caller, env->regs[R_ESP])) { + goto sigsegv; + } + + /* + * Validate the the pointer arguments. + */ + switch (syscall) { + case TARGET_NR_gettimeofday: + if (!write_ok_or_segv(env, env->regs[R_EDI], + sizeof(struct target_timeval)) || + !write_ok_or_segv(env, env->regs[R_ESI], + sizeof(struct target_timezone))) { + return; + } + break; + case TARGET_NR_time: + if (!write_ok_or_segv(env, env->regs[R_EDI], sizeof(abi_long))) { + return; + } + break; + case TARGET_NR_getcpu: + if (!write_ok_or_segv(env, env->regs[R_EDI], sizeof(uint32_t)) || + !write_ok_or_segv(env, env->regs[R_ESI], sizeof(uint32_t))) { + return; + } + break; + default: + g_assert_not_reached(); + } + + /* + * Perform the syscall. None of the vsyscalls should need restarting. + */ + ret = do_syscall(env, syscall, env->regs[R_EDI], env->regs[R_ESI], + env->regs[R_EDX], env->regs[10], env->regs[8], + env->regs[9], 0, 0); + g_assert(ret != -TARGET_ERESTARTSYS); + g_assert(ret != -TARGET_QEMU_ESIGRETURN); + if (ret == -TARGET_EFAULT) { + goto sigsegv; + } + env->regs[R_EAX] = ret; + + /* Emulate a ret instruction to leave the vsyscall page. */ + env->eip = caller; + env->regs[R_ESP] += 8; + return; + + sigsegv: + /* Like force_sig(SIGSEGV). */ + gen_signal(env, TARGET_SIGSEGV, TARGET_SI_KERNEL, 0); +} +#endif + void cpu_loop(CPUX86State *env) { CPUState *cs = env_cpu(env); @@ -141,6 +244,11 @@ void cpu_loop(CPUX86State *env) env->regs[R_EAX] = ret; } break; +#endif +#ifdef TARGET_X86_64 + case EXCP_VSYSCALL: + emulate_vsyscall(env); + break; #endif case EXCP0B_NOSEG: case EXCP0C_STACK: diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 08b4422f36bd..39be555db3da 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1001,6 +1001,7 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS]; #define EXCP_VMEXIT 0x100 /* only for system emulation */ #define EXCP_SYSCALL 0x101 /* only for user emulation */ +#define EXCP_VSYSCALL 0x102 /* only for user emulation */ /* i386-specific interrupt pending bits. */ #define CPU_INTERRUPT_POLL CPU_INTERRUPT_TGT_EXT_1 @@ -2215,4 +2216,10 @@ static inline bool hyperv_feat_enabled(X86CPU *cpu, int feat) return !!(cpu->hyperv_features & BIT(feat)); } +#if defined(TARGET_X86_64) && \ + defined(CONFIG_USER_ONLY) && \ + defined(CONFIG_LINUX) +# define TARGET_VSYSCALL_PAGE (UINT64_C(-10) << 20) +#endif + #endif /* I386_CPU_H */ diff --git a/target/i386/translate.c b/target/i386/translate.c index d9af8f4078b3..5e5dbb41b0ce 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -8555,7 +8555,19 @@ static bool i386_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cpu, static void i386_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) { DisasContext *dc = container_of(dcbase, DisasContext, base); - target_ulong pc_next = disas_insn(dc, cpu); + target_ulong pc_next; + +#ifdef TARGET_VSYSCALL_PAGE + /* + * Detect entry into the vsyscall page and invoke the syscall. + */ + if ((dc->base.pc_next & TARGET_PAGE_MASK) == TARGET_VSYSCALL_PAGE) { + gen_exception(dc, EXCP_VSYSCALL, dc->base.pc_next); + return; + } +#endif + + pc_next = disas_insn(dc, cpu); if (dc->tf || (dc->base.tb->flags & HF_INHIBIT_IRQ_MASK)) { /* if single step mode, we generate only one instruction and