[v2,7/9] target/arm: Clean address for DC ZVA

Message ID	20200302175829.2183-8-richard.henderson@linaro.org
State	Superseded
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Subject: [PATCH v2 7/9] target/arm: Clean address for DC ZVA Date: Mon, 2 Mar 2020 09:58:27 -0800 Message-Id: <20200302175829.2183-8-richard.henderson@linaro.org> In-Reply-To: <20200302175829.2183-1-richard.henderson@linaro.org> References: <20200302175829.2183-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: list Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>
Series	target/arm: Misc cleanups surrounding TBI \| expand [v2,0/9] target/arm: Misc cleanups surrounding TBI [v2,1/9] target/arm: Replicate TBI/TBID bits for single range regimes [v2,2/9] target/arm: Optimize cpu_mmu_index [v2,3/9] target/arm: Introduce core_to_aa64_mmu_idx [v2,4/9] target/arm: Apply TBI to ESR_ELx in helper_exception_return [v2,5/9] target/arm: Move helper_dc_zva to helper-a64.c [v2,6/9] target/arm: Use DEF_HELPER_FLAGS for helper_dc_zva [v2,7/9] target/arm: Clean address for DC ZVA [v2,8/9] target/arm: Check addresses for disabled regimes [v2,9/9] target/arm: Disable clean_data_tbi for system mode

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20200302175829.2183-8-richard.henderson@linaro.org

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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PATCH v2 7/9] target/arm: Clean address for DC ZVA
Date: Mon,  2 Mar 2020 09:58:27 -0800
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Series

target/arm: Misc cleanups surrounding TBI | expand

Commit Message

Richard Henderson March 2, 2020, 5:58 p.m. UTC

This data access was forgotten when we added support for cleaning
addresses of TBI information.

Fixes: 3a471103ac1823ba
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/arm/translate-a64.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-- 
2.20.1

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index c910a49b4e..fefe8af7f5 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -1784,7 +1784,7 @@  static void handle_sys(DisasContext *s, uint32_t insn, bool isread,
         return;
     case ARM_CP_DC_ZVA:
         /* Writes clear the aligned block of memory which rt points into. */
-        tcg_rt = cpu_reg(s, rt);
+        tcg_rt = clean_data_tbi(s, cpu_reg(s, rt));
         gen_helper_dc_zva(cpu_env, tcg_rt);
         return;
     default:

[v2,7/9] target/arm: Clean address for DC ZVA

Commit Message

Patch