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[v3,1/7] target/arm: Set ID_MMFR4.HPDS for aarch64_max_initfn

Message ID 20200218190958.745-2-richard.henderson@linaro.org
State Superseded
Headers show
Series target/arm: Honor more HCR_EL2 traps | expand

Commit Message

Richard Henderson Feb. 18, 2020, 7:09 p.m. UTC 
We had set this for aarch32-only in arm_max_initfn, but
failed to set the same bit for aarch64.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/arm/cpu64.c | 1 +
 1 file changed, 1 insertion(+)

-- 
2.20.1
diff mbox series

Patch

diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 32cf8ee98b..32c3e24a3d 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -704,6 +704,7 @@  static void aarch64_max_initfn(Object *obj)
         cpu->isar.id_mmfr3 = u;
 
         u = cpu->isar.id_mmfr4;
+        u = FIELD_DP32(u, ID_MMFR4, HPDS, 1); /* AA32HPD */
         u = FIELD_DP32(u, ID_MMFR4, AC2, 1); /* ACTLR2, HACTLR2 implemented */
         cpu->isar.id_mmfr4 = u;