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[209.51.188.17]) by mx.google.com with ESMTPS id q26si1447363qkc.306.2020.02.08.05.00.10 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 08 Feb 2020 05:00:10 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WICaqGP6; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:40946 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j0PiT-0003gF-Pu for patch@linaro.org; Sat, 08 Feb 2020 08:00:09 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:41304) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j0Pgj-0000OC-On for qemu-devel@nongnu.org; Sat, 08 Feb 2020 07:58:22 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j0Pgi-0004XF-II for qemu-devel@nongnu.org; Sat, 08 Feb 2020 07:58:21 -0500 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]:45983) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j0Pgi-0004UH-CU for qemu-devel@nongnu.org; Sat, 08 Feb 2020 07:58:20 -0500 Received: by mail-wr1-x441.google.com with SMTP id g3so962219wrs.12 for ; Sat, 08 Feb 2020 04:58:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+p2s9N3zCo3UaOQi/uOXcF/XhbniIaFNMwB/Qn1Qo28=; b=WICaqGP6mrzfkTePBo+m1JVOLT+bi80f8Zsj/fSTM6IiFyjvj4MsCflrTMFTA1ghhH AaMaMxSAITNg94g8T3aETiQOqyxBTlYqTmdtB2D2X7t8czpn8KyYkqEacpNVYFPAelUu t/UigsPrBN27GY4aZ/k8vXDv9/nrgMIuKmZwCil4hjqmge/wpKRVrmJyn3UjmAybDLuG UsDZGCbaQPNSm6DxkwvZ6FWDT9TpNvwmdrXXemkiSVtq+SAQ40/EuVXP2eY9fYQKT8F9 w9pjAg3C7/GViGgokNcbLUAhKHObeJuIpDkWBE2na9DYTsKBMHaOED7/M3FWTeCgBBAi hCOg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+p2s9N3zCo3UaOQi/uOXcF/XhbniIaFNMwB/Qn1Qo28=; b=i5EqAPYVzgIqSxTRgFJJev/LuMphoJ+R99I46UDde63QRtUjDBSrEWLqfG7WgsvxUf 1LAb6INQbrtN8MvrP4C6zOv/ZBk2EgJpa0/aEdHpiblOPnJEMlfQIlpKru7LZtLy87Dl E1wccxMxoGV36njCJRdlrD9UUZOTNwMNavvnw2bghi9iVNc/JidpzVplWP1p3h+BXZJ2 DzOC+Fbu7LhhmVlLfVNuNWld7SAOeu0JBqhGlPBl3Kty8cBhs1fk/ngX6LO5lZb8fRVB B0a43NY8SlN28qigLIyz5VsGb40EBEbFh1LiXQ9ANwU40LO6m/MQLaFwSNsSDdqIC9jL MNEA== X-Gm-Message-State: APjAAAWD90+qdlwcg7P8ilaSzex5BdWuUmi6ukBzVDtTC+ViioBJBQ7v Hoguo0Y5aYGgECKe9Z3BU86HwQ6PpMFxnQ== X-Received: by 2002:adf:b193:: with SMTP id q19mr5362141wra.78.1581166699008; Sat, 08 Feb 2020 04:58:19 -0800 (PST) Received: from localhost.localdomain ([82.3.55.76]) by smtp.gmail.com with ESMTPSA id p5sm7490534wrt.79.2020.02.08.04.58.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 08 Feb 2020 04:58:18 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 01/20] target/arm: Add arm_mmu_idx_is_stage1_of_2 Date: Sat, 8 Feb 2020 12:57:57 +0000 Message-Id: <20200208125816.14954-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200208125816.14954-1-richard.henderson@linaro.org> References: <20200208125816.14954-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::441 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Use a common predicate for querying stage1-ness. Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- v2: Rename from arm_mmu_idx_is_stage1 to arm_mmu_idx_is_stage1_of_2 --- target/arm/internals.h | 18 ++++++++++++++++++ target/arm/helper.c | 8 +++----- 2 files changed, 21 insertions(+), 5 deletions(-) -- 2.20.1 diff --git a/target/arm/internals.h b/target/arm/internals.h index 6d4a942bde..1f8ee5f573 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1034,6 +1034,24 @@ static inline ARMMMUIdx arm_stage1_mmu_idx(CPUARMState *env) ARMMMUIdx arm_stage1_mmu_idx(CPUARMState *env); #endif +/** + * arm_mmu_idx_is_stage1_of_2: + * @mmu_idx: The ARMMMUIdx to test + * + * Return true if @mmu_idx is a NOTLB mmu_idx that is the + * first stage of a two stage regime. + */ +static inline bool arm_mmu_idx_is_stage1_of_2(ARMMMUIdx mmu_idx) +{ + switch (mmu_idx) { + case ARMMMUIdx_Stage1_E0: + case ARMMMUIdx_Stage1_E1: + return true; + default: + return false; + } +} + /* * Parameters of a given virtual address, as extracted from the * translation control register (TCR) for a given regime. diff --git a/target/arm/helper.c b/target/arm/helper.c index 7d15d5c933..57dc7a307c 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -3261,8 +3261,7 @@ static uint64_t do_ats_write(CPUARMState *env, uint64_t value, bool take_exc = false; if (fi.s1ptw && current_el == 1 && !arm_is_secure(env) - && (mmu_idx == ARMMMUIdx_Stage1_E1 || - mmu_idx == ARMMMUIdx_Stage1_E0)) { + && arm_mmu_idx_is_stage1_of_2(mmu_idx)) { /* * Synchronous stage 2 fault on an access made as part of the * translation table walk for AT S1E0* or AT S1E1* insn @@ -9285,8 +9284,7 @@ static inline bool regime_translation_disabled(CPUARMState *env, } } - if ((env->cp15.hcr_el2 & HCR_DC) && - (mmu_idx == ARMMMUIdx_Stage1_E0 || mmu_idx == ARMMMUIdx_Stage1_E1)) { + if ((env->cp15.hcr_el2 & HCR_DC) && arm_mmu_idx_is_stage1_of_2(mmu_idx)) { /* HCR.DC means SCTLR_EL1.M behaves as 0 */ return true; } @@ -9595,7 +9593,7 @@ static hwaddr S1_ptw_translate(CPUARMState *env, ARMMMUIdx mmu_idx, hwaddr addr, MemTxAttrs txattrs, ARMMMUFaultInfo *fi) { - if ((mmu_idx == ARMMMUIdx_Stage1_E0 || mmu_idx == ARMMMUIdx_Stage1_E1) && + if (arm_mmu_idx_is_stage1_of_2(mmu_idx) && !regime_translation_disabled(env, ARMMMUIdx_Stage2)) { target_ulong s2size; hwaddr s2pa;