@@ -516,8 +516,6 @@ enum {
#define cpu_list m68k_cpu_list
/* MMU modes definitions */
-#define MMU_MODE0_SUFFIX _kernel
-#define MMU_MODE1_SUFFIX _user
#define MMU_KERNEL_IDX 0
#define MMU_USER_IDX 1
static inline int cpu_mmu_index (CPUM68KState *env, bool ifetch)
@@ -42,8 +42,8 @@ static void cf_rte(CPUM68KState *env)
uint32_t fmt;
sp = env->aregs[7];
- fmt = cpu_ldl_kernel(env, sp);
- env->pc = cpu_ldl_kernel(env, sp + 4);
+ fmt = cpu_ldl_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0);
+ env->pc = cpu_ldl_mmuidx_ra(env, sp + 4, MMU_KERNEL_IDX, 0);
sp |= (fmt >> 28) & 3;
env->aregs[7] = sp + 8;
@@ -58,13 +58,13 @@ static void m68k_rte(CPUM68KState *env)
sp = env->aregs[7];
throwaway:
- sr = cpu_lduw_kernel(env, sp);
+ sr = cpu_lduw_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0);
sp += 2;
- env->pc = cpu_ldl_kernel(env, sp);
+ env->pc = cpu_ldl_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0);
sp += 4;
if (m68k_feature(env, M68K_FEATURE_QUAD_MULDIV)) {
/* all except 68000 */
- fmt = cpu_lduw_kernel(env, sp);
+ fmt = cpu_lduw_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0);
sp += 2;
switch (fmt >> 12) {
case 0:
@@ -260,12 +260,12 @@ static void cf_interrupt_all(CPUM68KState *env, int is_hw)
/* ??? This could cause MMU faults. */
sp &= ~3;
sp -= 4;
- cpu_stl_kernel(env, sp, retaddr);
+ cpu_stl_mmuidx_ra(env, sp, retaddr, MMU_KERNEL_IDX, 0);
sp -= 4;
- cpu_stl_kernel(env, sp, fmt);
+ cpu_stl_mmuidx_ra(env, sp, fmt, MMU_KERNEL_IDX, 0);
env->aregs[7] = sp;
/* Jump to vector. */
- env->pc = cpu_ldl_kernel(env, env->vbr + vector);
+ env->pc = cpu_ldl_mmuidx_ra(env, env->vbr + vector, MMU_KERNEL_IDX, 0);
}
static inline void do_stack_frame(CPUM68KState *env, uint32_t *sp,
@@ -278,23 +278,24 @@ static inline void do_stack_frame(CPUM68KState *env, uint32_t *sp,
switch (format) {
case 4:
*sp -= 4;
- cpu_stl_kernel(env, *sp, env->pc);
+ cpu_stl_mmuidx_ra(env, *sp, env->pc, MMU_KERNEL_IDX, 0);
*sp -= 4;
- cpu_stl_kernel(env, *sp, addr);
+ cpu_stl_mmuidx_ra(env, *sp, addr, MMU_KERNEL_IDX, 0);
break;
case 3:
case 2:
*sp -= 4;
- cpu_stl_kernel(env, *sp, addr);
+ cpu_stl_mmuidx_ra(env, *sp, addr, MMU_KERNEL_IDX, 0);
break;
}
*sp -= 2;
- cpu_stw_kernel(env, *sp, (format << 12) + (cs->exception_index << 2));
+ cpu_stw_mmuidx_ra(env, *sp, (format << 12) + (cs->exception_index << 2),
+ MMU_KERNEL_IDX, 0);
}
*sp -= 4;
- cpu_stl_kernel(env, *sp, retaddr);
+ cpu_stl_mmuidx_ra(env, *sp, retaddr, MMU_KERNEL_IDX, 0);
*sp -= 2;
- cpu_stw_kernel(env, *sp, sr);
+ cpu_stw_mmuidx_ra(env, *sp, sr, MMU_KERNEL_IDX, 0);
}
static void m68k_interrupt_all(CPUM68KState *env, int is_hw)
@@ -353,36 +354,52 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw)
cpu_abort(cs, "DOUBLE MMU FAULT\n");
}
env->mmu.fault = true;
+ /* push data 3 */
sp -= 4;
- cpu_stl_kernel(env, sp, 0); /* push data 3 */
+ cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ /* push data 2 */
sp -= 4;
- cpu_stl_kernel(env, sp, 0); /* push data 2 */
+ cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ /* push data 1 */
sp -= 4;
- cpu_stl_kernel(env, sp, 0); /* push data 1 */
+ cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ /* write back 1 / push data 0 */
sp -= 4;
- cpu_stl_kernel(env, sp, 0); /* write back 1 / push data 0 */
+ cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ /* write back 1 address */
sp -= 4;
- cpu_stl_kernel(env, sp, 0); /* write back 1 address */
+ cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ /* write back 2 data */
sp -= 4;
- cpu_stl_kernel(env, sp, 0); /* write back 2 data */
+ cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ /* write back 2 address */
sp -= 4;
- cpu_stl_kernel(env, sp, 0); /* write back 2 address */
+ cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ /* write back 3 data */
sp -= 4;
- cpu_stl_kernel(env, sp, 0); /* write back 3 data */
+ cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ /* write back 3 address */
sp -= 4;
- cpu_stl_kernel(env, sp, env->mmu.ar); /* write back 3 address */
+ cpu_stl_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0);
+ /* fault address */
sp -= 4;
- cpu_stl_kernel(env, sp, env->mmu.ar); /* fault address */
+ cpu_stl_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0);
+ /* write back 1 status */
sp -= 2;
- cpu_stw_kernel(env, sp, 0); /* write back 1 status */
+ cpu_stw_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ /* write back 2 status */
sp -= 2;
- cpu_stw_kernel(env, sp, 0); /* write back 2 status */
+ cpu_stw_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ /* write back 3 status */
sp -= 2;
- cpu_stw_kernel(env, sp, 0); /* write back 3 status */
+ cpu_stw_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ /* special status word */
sp -= 2;
- cpu_stw_kernel(env, sp, env->mmu.ssw); /* special status word */
+ cpu_stw_mmuidx_ra(env, sp, env->mmu.ssw, MMU_KERNEL_IDX, 0);
+ /* effective address */
sp -= 4;
- cpu_stl_kernel(env, sp, env->mmu.ar); /* effective address */
+ cpu_stl_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0);
+
do_stack_frame(env, &sp, 7, oldsr, 0, retaddr);
env->mmu.fault = false;
if (qemu_loglevel_mask(CPU_LOG_INT)) {
@@ -414,7 +431,7 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw)
env->aregs[7] = sp;
/* Jump to vector. */
- env->pc = cpu_ldl_kernel(env, env->vbr + vector);
+ env->pc = cpu_ldl_mmuidx_ra(env, env->vbr + vector, MMU_KERNEL_IDX, 0);
}
static void do_interrupt_all(CPUM68KState *env, int is_hw)