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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.00.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:00:50 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 08/28] target/i386: Use cpu_*_mmuidx_ra instead of templates Date: Wed, 11 Dec 2019 20:00:19 -0800 Message-Id: <20191212040039.26546-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Received-From: 2607:f8b0:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Eduardo Habkost Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Do not use exec/cpu_ldst_{,useronly_}template.h directly, but instead use the functional interface. Cc: Paolo Bonzini Cc: Eduardo Habkost Signed-off-by: Richard Henderson --- target/i386/seg_helper.c | 75 ++++++++++++++++++++++++++-------------- 1 file changed, 50 insertions(+), 25 deletions(-) -- 2.20.1 Acked-by: Paolo Bonzini diff --git a/target/i386/seg_helper.c b/target/i386/seg_helper.c index 87a627f9dc..b348569c30 100644 --- a/target/i386/seg_helper.c +++ b/target/i386/seg_helper.c @@ -37,37 +37,62 @@ # define LOG_PCALL_STATE(cpu) do { } while (0) #endif -#ifdef CONFIG_USER_ONLY -#define MEMSUFFIX _kernel -#define DATA_SIZE 1 -#include "exec/cpu_ldst_useronly_template.h" +static inline uint32_t cpu_ldub_kernel_ra(CPUX86State *env, abi_ptr ptr, + uintptr_t ra) +{ + return cpu_ldub_mmuidx_ra(env, ptr, cpu_mmu_index_kernel(env), ra); +} -#define DATA_SIZE 2 -#include "exec/cpu_ldst_useronly_template.h" +static inline uint32_t cpu_lduw_kernel_ra(CPUX86State *env, abi_ptr ptr, + uintptr_t ra) +{ + return cpu_lduw_mmuidx_ra(env, ptr, cpu_mmu_index_kernel(env), ra); +} -#define DATA_SIZE 4 -#include "exec/cpu_ldst_useronly_template.h" +static inline uint32_t cpu_ldl_kernel_ra(CPUX86State *env, abi_ptr ptr, + uintptr_t ra) +{ + return cpu_ldl_mmuidx_ra(env, ptr, cpu_mmu_index_kernel(env), ra); +} -#define DATA_SIZE 8 -#include "exec/cpu_ldst_useronly_template.h" -#undef MEMSUFFIX -#else -#define CPU_MMU_INDEX (cpu_mmu_index_kernel(env)) -#define MEMSUFFIX _kernel -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" +static inline uint64_t cpu_ldq_kernel_ra(CPUX86State *env, abi_ptr ptr, + uintptr_t ra) +{ + return cpu_ldq_mmuidx_ra(env, ptr, cpu_mmu_index_kernel(env), ra); +} -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" +static inline void cpu_stb_kernel_ra(CPUX86State *env, target_ulong ptr, + uint32_t val, uintptr_t ra) +{ + cpu_stb_mmuidx_ra(env, ptr, val, cpu_mmu_index_kernel(env), ra); +} -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" +static inline void cpu_stw_kernel_ra(CPUX86State *env, target_ulong ptr, + uint32_t val, uintptr_t ra) +{ + cpu_stw_mmuidx_ra(env, ptr, val, cpu_mmu_index_kernel(env), ra); +} -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif +static inline void cpu_stl_kernel_ra(CPUX86State *env, target_ulong ptr, + uint32_t val, uintptr_t ra) +{ + cpu_stl_mmuidx_ra(env, ptr, val, cpu_mmu_index_kernel(env), ra); +} + +static inline void cpu_stq_kernel_ra(CPUX86State *env, target_ulong ptr, + uint64_t val, uintptr_t ra) +{ + cpu_stq_mmuidx_ra(env, ptr, val, cpu_mmu_index_kernel(env), ra); +} + +#define cpu_ldub_kernel(e, p) cpu_ldub_kernel_ra(e, p, 0) +#define cpu_lduw_kernel(e, p) cpu_lduw_kernel_ra(e, p, 0) +#define cpu_ldl_kernel(e, p) cpu_ldl_kernel_ra(e, p, 0) +#define cpu_ldq_kernel(e, p) cpu_ldq_kernel_ra(e, p, 0) +#define cpu_stb_kernel(e, p, v) cpu_stb_kernel_ra(e, p, v, 0) +#define cpu_stw_kernel(e, p, v) cpu_stw_kernel_ra(e, p, v, 0) +#define cpu_stl_kernel(e, p, v) cpu_stl_kernel_ra(e, p, v, 0) +#define cpu_stq_kernel(e, p, v) cpu_stq_kernel_ra(e, p, v, 0) /* return non zero if error */ static inline int load_segment_ra(CPUX86State *env, uint32_t *e1_ptr,