| Message ID | 20191203022937.1474-21-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | target/arm: Implement ARMv8.1-VHE | expand |
Richard Henderson <richard.henderson@linaro.org> writes: > Return the indexes for the EL2&0 regime when the appropriate bits > are set within HCR_EL2. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> > --- > target/arm/helper.c | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git a/target/arm/helper.c b/target/arm/helper.c > index 27adf24fa6..c6b4c0a25f 100644 > --- a/target/arm/helper.c > +++ b/target/arm/helper.c > @@ -11172,12 +11172,16 @@ ARMMMUIdx arm_mmu_idx_el(CPUARMState *env, int el) > return arm_v7m_mmu_idx_for_secstate(env, env->v7m.secure); > } > > + /* See ARM pseudo-function ELIsInHost. */ > switch (el) { > case 0: > - /* TODO: ARMv8.1-VHE */ > if (arm_is_secure_below_el3(env)) { > return ARMMMUIdx_SE0; > } > + if ((env->cp15.hcr_el2 & (HCR_E2H | HCR_TGE)) == (HCR_E2H | HCR_TGE) > + && arm_el_is_aa64(env, 2)) { > + return ARMMMUIdx_EL20_0; > + } > return ARMMMUIdx_EL10_0; > case 1: > if (arm_is_secure_below_el3(env)) { > @@ -11185,8 +11189,11 @@ ARMMMUIdx arm_mmu_idx_el(CPUARMState *env, int el) > } > return ARMMMUIdx_EL10_1; > case 2: > - /* TODO: ARMv8.1-VHE */ > /* TODO: ARMv8.4-SecEL2 */ > + /* Note that TGE does not apply at EL2. */ > + if ((env->cp15.hcr_el2 & HCR_E2H) && arm_el_is_aa64(env, 2)) { > + return ARMMMUIdx_EL20_2; > + } > return ARMMMUIdx_E2; > case 3: > return ARMMMUIdx_SE3; -- Alex Bennée
diff --git a/target/arm/helper.c b/target/arm/helper.c index 27adf24fa6..c6b4c0a25f 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11172,12 +11172,16 @@ ARMMMUIdx arm_mmu_idx_el(CPUARMState *env, int el) return arm_v7m_mmu_idx_for_secstate(env, env->v7m.secure); } + /* See ARM pseudo-function ELIsInHost. */ switch (el) { case 0: - /* TODO: ARMv8.1-VHE */ if (arm_is_secure_below_el3(env)) { return ARMMMUIdx_SE0; } + if ((env->cp15.hcr_el2 & (HCR_E2H | HCR_TGE)) == (HCR_E2H | HCR_TGE) + && arm_el_is_aa64(env, 2)) { + return ARMMMUIdx_EL20_0; + } return ARMMMUIdx_EL10_0; case 1: if (arm_is_secure_below_el3(env)) { @@ -11185,8 +11189,11 @@ ARMMMUIdx arm_mmu_idx_el(CPUARMState *env, int el) } return ARMMMUIdx_EL10_1; case 2: - /* TODO: ARMv8.1-VHE */ /* TODO: ARMv8.4-SecEL2 */ + /* Note that TGE does not apply at EL2. */ + if ((env->cp15.hcr_el2 & HCR_E2H) && arm_el_is_aa64(env, 2)) { + return ARMMMUIdx_EL20_2; + } return ARMMMUIdx_E2; case 3: return ARMMMUIdx_SE3;
Return the indexes for the EL2&0 regime when the appropriate bits are set within HCR_EL2. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/arm/helper.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) -- 2.17.1