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[213.99.189.56]) by smtp.gmail.com with ESMTPSA id u26sm10012284wmj.9.2019.11.15.05.16.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Nov 2019 05:16:35 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH] target/arm: Clean up arm_cpu_vq_map_next_smaller asserts Date: Fri, 15 Nov 2019 14:16:23 +0100 Message-Id: <20191115131623.322-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::442 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, drjones@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Coverity reports, in sve_zcr_get_valid_len, "Subtract operation overflows on operands arm_cpu_vq_map_next_smaller(cpu, start_vq + 1U) and 1U" First, fix the aarch32 stub version to not return 0, but to simply assert unreachable. Because that nonsense return value does exactly what Coverity reports. Second, 1 is the minimum value that can be returned from the aarch64 version of arm_cpu_vq_map_next_smaller, but that is non-obvious from the set of asserts in the function. Begin by asserting that 2 is the minimum input, and finish by asserting that we did in fact find a set bit in the bitmap. Bit 0 is always set, so we must be able to find that. Reported-by: Coverity (CID 1407217) Signed-off-by: Richard Henderson --- target/arm/cpu.h | 4 +++- target/arm/cpu64.c | 11 +++++++++-- 2 files changed, 12 insertions(+), 3 deletions(-) -- 2.17.1 Reviewed-by: Alex Bennée diff --git a/target/arm/cpu.h b/target/arm/cpu.h index e1a66a2d1c..d89e727d7b 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -190,7 +190,9 @@ uint32_t arm_cpu_vq_map_next_smaller(ARMCPU *cpu, uint32_t vq); # define ARM_MAX_VQ 1 static inline void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) { } static inline uint32_t arm_cpu_vq_map_next_smaller(ARMCPU *cpu, uint32_t vq) -{ return 0; } +{ + g_assert_not_reached(); +} #endif typedef struct ARMVectorReg { diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 68baf0482f..83ff8c8713 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -466,11 +466,18 @@ uint32_t arm_cpu_vq_map_next_smaller(ARMCPU *cpu, uint32_t vq) * We allow vq == ARM_MAX_VQ + 1 to be input because the caller may want * to find the maximum vq enabled, which may be ARM_MAX_VQ, but this * function always returns the next smaller than the input. + * + * Similarly, vq == 2 is the minimum input because 1 is the minimum + * output that makes sense. */ - assert(vq && vq <= ARM_MAX_VQ + 1); + assert(vq >= 2 && vq <= ARM_MAX_VQ + 1); bitnum = find_last_bit(cpu->sve_vq_map, vq - 1); - return bitnum == vq - 1 ? 0 : bitnum + 1; + + /* We always have vq == 1 present in sve_vq_map. */ + assert(bitnum < vq - 1); + + return bitnum + 1; } static void cpu_max_get_sve_max_vq(Object *obj, Visitor *v, const char *name,