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[176.87.122.31]) by smtp.gmail.com with ESMTPSA id q124sm1776907wme.13.2019.11.06.03.33.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Nov 2019 03:33:42 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 10/12] linux-user: Introduce cpu_clone_regs_parent Date: Wed, 6 Nov 2019 12:33:16 +0100 Message-Id: <20191106113318.10226-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191106113318.10226-1-richard.henderson@linaro.org> References: <20191106113318.10226-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We will need a target-specific hook for adjusting registers in the parent during clone. Add an empty inline function for each target, and invoke it from the proper places. Reviewed-by: Laurent Vivier Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20191025113921.9412-11-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier --- linux-user/aarch64/target_cpu.h | 4 ++++ linux-user/alpha/target_cpu.h | 4 ++++ linux-user/arm/target_cpu.h | 4 ++++ linux-user/cris/target_cpu.h | 4 ++++ linux-user/hppa/target_cpu.h | 4 ++++ linux-user/i386/target_cpu.h | 4 ++++ linux-user/m68k/target_cpu.h | 4 ++++ linux-user/microblaze/target_cpu.h | 4 ++++ linux-user/mips/target_cpu.h | 4 ++++ linux-user/nios2/target_cpu.h | 4 ++++ linux-user/openrisc/target_cpu.h | 4 ++++ linux-user/ppc/target_cpu.h | 4 ++++ linux-user/riscv/target_cpu.h | 4 ++++ linux-user/s390x/target_cpu.h | 4 ++++ linux-user/sh4/target_cpu.h | 4 ++++ linux-user/sparc/target_cpu.h | 4 ++++ linux-user/tilegx/target_cpu.h | 4 ++++ linux-user/xtensa/target_cpu.h | 4 ++++ linux-user/syscall.c | 2 ++ 19 files changed, 74 insertions(+) -- 2.17.1 diff --git a/linux-user/aarch64/target_cpu.h b/linux-user/aarch64/target_cpu.h index cd012e0dc1..6cc02e7dcd 100644 --- a/linux-user/aarch64/target_cpu.h +++ b/linux-user/aarch64/target_cpu.h @@ -28,6 +28,10 @@ static inline void cpu_clone_regs_child(CPUARMState *env, target_ulong newsp, env->xregs[0] = 0; } +static inline void cpu_clone_regs_parent(CPUARMState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUARMState *env, target_ulong newtls) { /* Note that AArch64 Linux keeps the TLS pointer in TPIDR; this is diff --git a/linux-user/alpha/target_cpu.h b/linux-user/alpha/target_cpu.h index 37ba00cf41..dd25e18f47 100644 --- a/linux-user/alpha/target_cpu.h +++ b/linux-user/alpha/target_cpu.h @@ -29,6 +29,10 @@ static inline void cpu_clone_regs_child(CPUAlphaState *env, target_ulong newsp, env->ir[IR_A3] = 0; } +static inline void cpu_clone_regs_parent(CPUAlphaState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUAlphaState *env, target_ulong newtls) { env->unique = newtls; diff --git a/linux-user/arm/target_cpu.h b/linux-user/arm/target_cpu.h index 6e2ba8ad4b..2747211b24 100644 --- a/linux-user/arm/target_cpu.h +++ b/linux-user/arm/target_cpu.h @@ -50,6 +50,10 @@ static inline void cpu_clone_regs_child(CPUARMState *env, target_ulong newsp, env->regs[0] = 0; } +static inline void cpu_clone_regs_parent(CPUARMState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUARMState *env, target_ulong newtls) { if (access_secure_reg(env)) { diff --git a/linux-user/cris/target_cpu.h b/linux-user/cris/target_cpu.h index eacc4d8d13..74ead55c81 100644 --- a/linux-user/cris/target_cpu.h +++ b/linux-user/cris/target_cpu.h @@ -29,6 +29,10 @@ static inline void cpu_clone_regs_child(CPUCRISState *env, target_ulong newsp, env->regs[10] = 0; } +static inline void cpu_clone_regs_parent(CPUCRISState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUCRISState *env, target_ulong newtls) { env->pregs[PR_PID] = (env->pregs[PR_PID] & 0xff) | newtls; diff --git a/linux-user/hppa/target_cpu.h b/linux-user/hppa/target_cpu.h index f250770790..71654b3cd4 100644 --- a/linux-user/hppa/target_cpu.h +++ b/linux-user/hppa/target_cpu.h @@ -32,6 +32,10 @@ static inline void cpu_clone_regs_child(CPUHPPAState *env, target_ulong newsp, env->iaoq_b = env->gr[31] + 4; } +static inline void cpu_clone_regs_parent(CPUHPPAState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUHPPAState *env, target_ulong newtls) { env->cr[27] = newtls; diff --git a/linux-user/i386/target_cpu.h b/linux-user/i386/target_cpu.h index 1fadbf57c3..0b44530854 100644 --- a/linux-user/i386/target_cpu.h +++ b/linux-user/i386/target_cpu.h @@ -29,6 +29,10 @@ static inline void cpu_clone_regs_child(CPUX86State *env, target_ulong newsp, env->regs[R_EAX] = 0; } +static inline void cpu_clone_regs_parent(CPUX86State *env, unsigned flags) +{ +} + #if defined(TARGET_ABI32) abi_long do_set_thread_area(CPUX86State *env, abi_ulong ptr); diff --git a/linux-user/m68k/target_cpu.h b/linux-user/m68k/target_cpu.h index 57b647bc07..c3f288dfe8 100644 --- a/linux-user/m68k/target_cpu.h +++ b/linux-user/m68k/target_cpu.h @@ -30,6 +30,10 @@ static inline void cpu_clone_regs_child(CPUM68KState *env, target_ulong newsp, env->dregs[0] = 0; } +static inline void cpu_clone_regs_parent(CPUM68KState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUM68KState *env, target_ulong newtls) { CPUState *cs = env_cpu(env); diff --git a/linux-user/microblaze/target_cpu.h b/linux-user/microblaze/target_cpu.h index e9bc0fce65..ce7b22ece7 100644 --- a/linux-user/microblaze/target_cpu.h +++ b/linux-user/microblaze/target_cpu.h @@ -28,6 +28,10 @@ static inline void cpu_clone_regs_child(CPUMBState *env, target_ulong newsp, env->regs[3] = 0; } +static inline void cpu_clone_regs_parent(CPUMBState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUMBState *env, target_ulong newtls) { env->regs[21] = newtls; diff --git a/linux-user/mips/target_cpu.h b/linux-user/mips/target_cpu.h index 8601f712e0..758ae4d933 100644 --- a/linux-user/mips/target_cpu.h +++ b/linux-user/mips/target_cpu.h @@ -29,6 +29,10 @@ static inline void cpu_clone_regs_child(CPUMIPSState *env, target_ulong newsp, env->active_tc.gpr[2] = 0; } +static inline void cpu_clone_regs_parent(CPUMIPSState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUMIPSState *env, target_ulong newtls) { env->active_tc.CP0_UserLocal = newtls; diff --git a/linux-user/nios2/target_cpu.h b/linux-user/nios2/target_cpu.h index fe5de7a9e3..50f0381067 100644 --- a/linux-user/nios2/target_cpu.h +++ b/linux-user/nios2/target_cpu.h @@ -29,6 +29,10 @@ static inline void cpu_clone_regs_child(CPUNios2State *env, target_ulong newsp, env->regs[R_RET0] = 0; } +static inline void cpu_clone_regs_parent(CPUNios2State *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUNios2State *env, target_ulong newtls) { /* diff --git a/linux-user/openrisc/target_cpu.h b/linux-user/openrisc/target_cpu.h index 309cf3eeb7..74370d67c4 100644 --- a/linux-user/openrisc/target_cpu.h +++ b/linux-user/openrisc/target_cpu.h @@ -30,6 +30,10 @@ static inline void cpu_clone_regs_child(CPUOpenRISCState *env, cpu_set_gpr(env, 11, 0); } +static inline void cpu_clone_regs_parent(CPUOpenRISCState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUOpenRISCState *env, target_ulong newtls) { cpu_set_gpr(env, 10, newtls); diff --git a/linux-user/ppc/target_cpu.h b/linux-user/ppc/target_cpu.h index 028b28312c..76b67d2882 100644 --- a/linux-user/ppc/target_cpu.h +++ b/linux-user/ppc/target_cpu.h @@ -28,6 +28,10 @@ static inline void cpu_clone_regs_child(CPUPPCState *env, target_ulong newsp, env->gpr[3] = 0; } +static inline void cpu_clone_regs_parent(CPUPPCState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUPPCState *env, target_ulong newtls) { #if defined(TARGET_PPC64) diff --git a/linux-user/riscv/target_cpu.h b/linux-user/riscv/target_cpu.h index 26dcafab1c..9c642367a3 100644 --- a/linux-user/riscv/target_cpu.h +++ b/linux-user/riscv/target_cpu.h @@ -11,6 +11,10 @@ static inline void cpu_clone_regs_child(CPURISCVState *env, target_ulong newsp, env->gpr[xA0] = 0; } +static inline void cpu_clone_regs_parent(CPURISCVState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPURISCVState *env, target_ulong newtls) { env->gpr[xTP] = newtls; diff --git a/linux-user/s390x/target_cpu.h b/linux-user/s390x/target_cpu.h index 0b19e42f75..7cd71e2dba 100644 --- a/linux-user/s390x/target_cpu.h +++ b/linux-user/s390x/target_cpu.h @@ -28,6 +28,10 @@ static inline void cpu_clone_regs_child(CPUS390XState *env, target_ulong newsp, env->regs[2] = 0; } +static inline void cpu_clone_regs_parent(CPUS390XState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUS390XState *env, target_ulong newtls) { env->aregs[0] = newtls >> 32; diff --git a/linux-user/sh4/target_cpu.h b/linux-user/sh4/target_cpu.h index 857af43ee3..5114f19424 100644 --- a/linux-user/sh4/target_cpu.h +++ b/linux-user/sh4/target_cpu.h @@ -28,6 +28,10 @@ static inline void cpu_clone_regs_child(CPUSH4State *env, target_ulong newsp, env->gregs[0] = 0; } +static inline void cpu_clone_regs_parent(CPUSH4State *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUSH4State *env, target_ulong newtls) { env->gbr = newtls; diff --git a/linux-user/sparc/target_cpu.h b/linux-user/sparc/target_cpu.h index 029b0fc547..8ff706adce 100644 --- a/linux-user/sparc/target_cpu.h +++ b/linux-user/sparc/target_cpu.h @@ -37,6 +37,10 @@ static inline void cpu_clone_regs_child(CPUSPARCState *env, target_ulong newsp, #endif } +static inline void cpu_clone_regs_parent(CPUSPARCState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUSPARCState *env, target_ulong newtls) { env->gregs[7] = newtls; diff --git a/linux-user/tilegx/target_cpu.h b/linux-user/tilegx/target_cpu.h index 0523dc414c..316b7a639c 100644 --- a/linux-user/tilegx/target_cpu.h +++ b/linux-user/tilegx/target_cpu.h @@ -28,6 +28,10 @@ static inline void cpu_clone_regs_child(CPUTLGState *env, target_ulong newsp, env->regs[TILEGX_R_RE] = 0; } +static inline void cpu_clone_regs_parent(CPUTLGState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUTLGState *env, target_ulong newtls) { env->regs[TILEGX_R_TP] = newtls; diff --git a/linux-user/xtensa/target_cpu.h b/linux-user/xtensa/target_cpu.h index 84f67d469e..0c77bafd66 100644 --- a/linux-user/xtensa/target_cpu.h +++ b/linux-user/xtensa/target_cpu.h @@ -16,6 +16,10 @@ static inline void cpu_clone_regs_child(CPUXtensaState *env, env->regs[2] = 0; } +static inline void cpu_clone_regs_parent(CPUXtensaState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUXtensaState *env, target_ulong newtls) { env->uregs[THREADPTR] = newtls; diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 93749014e4..96cf9deb3d 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -5720,6 +5720,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp, new_env = cpu_copy(env); /* Init regs that differ from the parent. */ cpu_clone_regs_child(new_env, newsp, flags); + cpu_clone_regs_parent(env, flags); new_cpu = env_cpu(new_env); new_cpu->opaque = ts; ts->bprm = parent_ts->bprm; @@ -5816,6 +5817,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp, if (flags & CLONE_CHILD_CLEARTID) ts->child_tidptr = child_tidptr; } else { + cpu_clone_regs_parent(env, flags); fork_end(0); } }