@@ -19,7 +19,8 @@
#ifndef AARCH64_TARGET_CPU_H
#define AARCH64_TARGET_CPU_H
-static inline void cpu_clone_regs(CPUARMState *env, target_ulong newsp)
+static inline void cpu_clone_regs_child(CPUARMState *env, target_ulong newsp,
+ unsigned flags)
{
if (newsp) {
env->xregs[31] = newsp;
@@ -19,7 +19,8 @@
#ifndef ALPHA_TARGET_CPU_H
#define ALPHA_TARGET_CPU_H
-static inline void cpu_clone_regs(CPUAlphaState *env, target_ulong newsp)
+static inline void cpu_clone_regs_child(CPUAlphaState *env, target_ulong newsp,
+ unsigned flags)
{
if (newsp) {
env->ir[IR_SP] = newsp;
@@ -41,7 +41,8 @@ static inline unsigned long arm_max_reserved_va(CPUState *cs)
}
#define MAX_RESERVED_VA arm_max_reserved_va
-static inline void cpu_clone_regs(CPUARMState *env, target_ulong newsp)
+static inline void cpu_clone_regs_child(CPUARMState *env, target_ulong newsp,
+ unsigned flags)
{
if (newsp) {
env->regs[13] = newsp;
@@ -20,7 +20,8 @@
#ifndef CRIS_TARGET_CPU_H
#define CRIS_TARGET_CPU_H
-static inline void cpu_clone_regs(CPUCRISState *env, target_ulong newsp)
+static inline void cpu_clone_regs_child(CPUCRISState *env, target_ulong newsp,
+ unsigned flags)
{
if (newsp) {
env->regs[14] = newsp;
@@ -19,7 +19,8 @@
#ifndef HPPA_TARGET_CPU_H
#define HPPA_TARGET_CPU_H
-static inline void cpu_clone_regs(CPUHPPAState *env, target_ulong newsp)
+static inline void cpu_clone_regs_child(CPUHPPAState *env, target_ulong newsp,
+ unsigned flags)
{
if (newsp) {
env->gr[30] = newsp;
@@ -20,7 +20,8 @@
#ifndef I386_TARGET_CPU_H
#define I386_TARGET_CPU_H
-static inline void cpu_clone_regs(CPUX86State *env, target_ulong newsp)
+static inline void cpu_clone_regs_child(CPUX86State *env, target_ulong newsp,
+ unsigned flags)
{
if (newsp) {
env->regs[R_ESP] = newsp;
@@ -21,7 +21,8 @@
#ifndef M68K_TARGET_CPU_H
#define M68K_TARGET_CPU_H
-static inline void cpu_clone_regs(CPUM68KState *env, target_ulong newsp)
+static inline void cpu_clone_regs_child(CPUM68KState *env, target_ulong newsp,
+ unsigned flags)
{
if (newsp) {
env->aregs[7] = newsp;
@@ -19,7 +19,8 @@
#ifndef MICROBLAZE_TARGET_CPU_H
#define MICROBLAZE_TARGET_CPU_H
-static inline void cpu_clone_regs(CPUMBState *env, target_ulong newsp)
+static inline void cpu_clone_regs_child(CPUMBState *env, target_ulong newsp,
+ unsigned flags)
{
if (newsp) {
env->regs[R_SP] = newsp;
@@ -19,7 +19,8 @@
#ifndef MIPS_TARGET_CPU_H
#define MIPS_TARGET_CPU_H
-static inline void cpu_clone_regs(CPUMIPSState *env, target_ulong newsp)
+static inline void cpu_clone_regs_child(CPUMIPSState *env, target_ulong newsp,
+ unsigned flags)
{
if (newsp) {
env->active_tc.gpr[29] = newsp;
@@ -20,7 +20,8 @@
#ifndef NIOS2_TARGET_CPU_H
#define NIOS2_TARGET_CPU_H
-static inline void cpu_clone_regs(CPUNios2State *env, target_ulong newsp)
+static inline void cpu_clone_regs_child(CPUNios2State *env, target_ulong newsp,
+ unsigned flags)
{
if (newsp) {
env->regs[R_SP] = newsp;
@@ -20,7 +20,9 @@
#ifndef OPENRISC_TARGET_CPU_H
#define OPENRISC_TARGET_CPU_H
-static inline void cpu_clone_regs(CPUOpenRISCState *env, target_ulong newsp)
+static inline void cpu_clone_regs_child(CPUOpenRISCState *env,
+ target_ulong newsp,
+ unsigned flags)
{
if (newsp) {
cpu_set_gpr(env, 1, newsp);
@@ -19,7 +19,8 @@
#ifndef PPC_TARGET_CPU_H
#define PPC_TARGET_CPU_H
-static inline void cpu_clone_regs(CPUPPCState *env, target_ulong newsp)
+static inline void cpu_clone_regs_child(CPUPPCState *env, target_ulong newsp,
+ unsigned flags)
{
if (newsp) {
env->gpr[1] = newsp;
@@ -1,7 +1,8 @@
#ifndef RISCV_TARGET_CPU_H
#define RISCV_TARGET_CPU_H
-static inline void cpu_clone_regs(CPURISCVState *env, target_ulong newsp)
+static inline void cpu_clone_regs_child(CPURISCVState *env, target_ulong newsp,
+ unsigned flags)
{
if (newsp) {
env->gpr[xSP] = newsp;
@@ -19,7 +19,8 @@
#ifndef S390X_TARGET_CPU_H
#define S390X_TARGET_CPU_H
-static inline void cpu_clone_regs(CPUS390XState *env, target_ulong newsp)
+static inline void cpu_clone_regs_child(CPUS390XState *env, target_ulong newsp,
+ unsigned flags)
{
if (newsp) {
env->regs[15] = newsp;
@@ -19,7 +19,8 @@
#ifndef SH4_TARGET_CPU_H
#define SH4_TARGET_CPU_H
-static inline void cpu_clone_regs(CPUSH4State *env, target_ulong newsp)
+static inline void cpu_clone_regs_child(CPUSH4State *env, target_ulong newsp,
+ unsigned flags)
{
if (newsp) {
env->gregs[15] = newsp;
@@ -20,7 +20,8 @@
#ifndef SPARC_TARGET_CPU_H
#define SPARC_TARGET_CPU_H
-static inline void cpu_clone_regs(CPUSPARCState *env, target_ulong newsp)
+static inline void cpu_clone_regs_child(CPUSPARCState *env, target_ulong newsp,
+ unsigned flags)
{
if (newsp) {
env->regwptr[22] = newsp;
@@ -19,7 +19,8 @@
#ifndef TILEGX_TARGET_CPU_H
#define TILEGX_TARGET_CPU_H
-static inline void cpu_clone_regs(CPUTLGState *env, target_ulong newsp)
+static inline void cpu_clone_regs_child(CPUTLGState *env, target_ulong newsp,
+ unsigned flags)
{
if (newsp) {
env->regs[TILEGX_R_SP] = newsp;
@@ -4,7 +4,9 @@
#ifndef XTENSA_TARGET_CPU_H
#define XTENSA_TARGET_CPU_H
-static inline void cpu_clone_regs(CPUXtensaState *env, target_ulong newsp)
+static inline void cpu_clone_regs_child(CPUXtensaState *env,
+ target_ulong newsp,
+ unsigned flags)
{
if (newsp) {
env->regs[1] = newsp;
@@ -5719,7 +5719,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp,
/* we create a new CPU instance. */
new_env = cpu_copy(env);
/* Init regs that differ from the parent. */
- cpu_clone_regs(new_env, newsp);
+ cpu_clone_regs_child(new_env, newsp, flags);
new_cpu = env_cpu(new_env);
new_cpu->opaque = ts;
ts->bprm = parent_ts->bprm;
@@ -5798,7 +5798,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp,
ret = fork();
if (ret == 0) {
/* Child Process. */
- cpu_clone_regs(env, newsp);
+ cpu_clone_regs_child(env, newsp, flags);
fork_end(1);
/* There is a race condition here. The parent process could
theoretically read the TID in the child process before the child