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[88.138.106.230]) by smtp.gmail.com with ESMTPSA id 143sm14842876wmb.33.2019.10.28.07.59.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2019 07:59:39 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL v2 01/12] tci: Add implementation for INDEX_op_ld16u_i64 Date: Mon, 28 Oct 2019 15:59:26 +0100 Message-Id: <20191028145937.10914-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028145937.10914-1-richard.henderson@linaro.org> References: <20191028145937.10914-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32e X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Stefan Weil Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Stefan Weil This fixes "make check-tcg" on a Debian x86_64 host. Signed-off-by: Stefan Weil Tested-by: Thomas Huth Message-Id: <20190410194838.10123-1-sw@weilnetz.de> Signed-off-by: Richard Henderson --- tcg/tci.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) -- 2.17.1 diff --git a/tcg/tci.c b/tcg/tci.c index 33edca1903..a6208653e8 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -127,6 +127,12 @@ static void tci_write_reg8(tcg_target_ulong *regs, TCGReg index, uint8_t value) tci_write_reg(regs, index, value); } +static void +tci_write_reg16(tcg_target_ulong *regs, TCGReg index, uint16_t value) +{ + tci_write_reg(regs, index, value); +} + static void tci_write_reg32(tcg_target_ulong *regs, TCGReg index, uint32_t value) { @@ -585,6 +591,8 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr) tci_write_reg8(regs, t0, *(uint8_t *)(t1 + t2)); break; case INDEX_op_ld8s_i32: + TODO(); + break; case INDEX_op_ld16u_i32: TODO(); break; @@ -854,7 +862,14 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr) tci_write_reg8(regs, t0, *(uint8_t *)(t1 + t2)); break; case INDEX_op_ld8s_i64: + TODO(); + break; case INDEX_op_ld16u_i64: + t0 = *tb_ptr++; + t1 = tci_read_r(regs, &tb_ptr); + t2 = tci_read_s32(&tb_ptr); + tci_write_reg16(regs, t0, *(uint16_t *)(t1 + t2)); + break; case INDEX_op_ld16s_i64: TODO(); break;