@@ -127,6 +127,12 @@ static void tci_write_reg8(tcg_target_ulong *regs, TCGReg index, uint8_t value)
tci_write_reg(regs, index, value);
}
+static void
+tci_write_reg16(tcg_target_ulong *regs, TCGReg index, uint16_t value)
+{
+ tci_write_reg(regs, index, value);
+}
+
static void
tci_write_reg32(tcg_target_ulong *regs, TCGReg index, uint32_t value)
{
@@ -585,6 +591,8 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
tci_write_reg8(regs, t0, *(uint8_t *)(t1 + t2));
break;
case INDEX_op_ld8s_i32:
+ TODO();
+ break;
case INDEX_op_ld16u_i32:
TODO();
break;
@@ -854,7 +862,14 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
tci_write_reg8(regs, t0, *(uint8_t *)(t1 + t2));
break;
case INDEX_op_ld8s_i64:
+ TODO();
+ break;
case INDEX_op_ld16u_i64:
+ t0 = *tb_ptr++;
+ t1 = tci_read_r(regs, &tb_ptr);
+ t2 = tci_read_s32(&tb_ptr);
+ tci_write_reg16(regs, t0, *(uint16_t *)(t1 + t2));
+ break;
case INDEX_op_ld16s_i64:
TODO();
break;