[PULL,10/12] cputlb: Fix tlb_vaddr_to_host

Message ID	20191025142159.12459-11-richard.henderson@linaro.org
State	Superseded
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Subject: [PULL 10/12] cputlb: Fix tlb_vaddr_to_host Date: Fri, 25 Oct 2019 10:21:57 -0400 Message-Id: <20191025142159.12459-11-richard.henderson@linaro.org> In-Reply-To: <20191025142159.12459-1-richard.henderson@linaro.org> References: <20191025142159.12459-1-richard.henderson@linaro.org> Precedence: list Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>
Series	tcg patch queue \| expand [PULL,00/12] tcg patch queue [PULL,01/12] tci: Add implementation for INDEX_op_ld16u_i64 [PULL,02/12] cputlb: ensure _cmmu helper functions follow the naming standard [PULL,03/12] cpu: use ROUND_UP() to define xxx_PAGE_ALIGN [PULL,04/12] exec: Split out variable page size support to exec-vary.c [PULL,05/12] configure: Detect compiler support for __attribute__((alias)) [PULL,06/12] exec: Use const alias for TARGET_PAGE_BITS_VARY [PULL,07/12] exec: Restrict TARGET_PAGE_BITS_VARY assert to CONFIG_DEBUG_TCG [PULL,08/12] exec: Promote TARGET_PAGE_MASK to target_long [PULL,09/12] exec: Cache TARGET_PAGE_MASK for TARGET_PAGE_BITS_VARY [PULL,10/12] cputlb: Fix tlb_vaddr_to_host [PULL,11/12] translate-all: fix uninitialized tb->orig_tb [PULL,12/12] translate-all: Remove tb_alloc

Message ID

20191025142159.12459-11-richard.henderson@linaro.org

State

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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 10/12] cputlb: Fix tlb_vaddr_to_host
Date: Fri, 25 Oct 2019 10:21:57 -0400
Message-Id: <20191025142159.12459-11-richard.henderson@linaro.org>
In-Reply-To: <20191025142159.12459-1-richard.henderson@linaro.org>
References: <20191025142159.12459-1-richard.henderson@linaro.org>
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Cc: peter.maydell@linaro.org
Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org
Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>

Series

tcg patch queue | expand

Commit Message

Richard Henderson Oct. 25, 2019, 2:21 p.m. UTC

Using uintptr_t instead of target_ulong meant that, for 64-bit guest
and 32-bit host, we truncated the guest address comparator and so may
not hit the tlb when we should.

Fixes: 4811e9095c0
Reviewed-by: David Hildenbrand <david@redhat.com>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 accel/tcg/cputlb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-- 
2.17.1

diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 6f4194df96..5eebddcca8 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1189,7 +1189,7 @@  void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr,
                         MMUAccessType access_type, int mmu_idx)
 {
     CPUTLBEntry *entry = tlb_entry(env, mmu_idx, addr);
-    uintptr_t tlb_addr, page;
+    target_ulong tlb_addr, page;
     size_t elt_ofs;
 
     switch (access_type) {

[PULL,10/12] cputlb: Fix tlb_vaddr_to_host

Commit Message

Patch