From patchwork Tue Oct 15 01:29:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 176358 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp5249984ill; Mon, 14 Oct 2019 18:29:51 -0700 (PDT) X-Google-Smtp-Source: APXvYqy//eV+bIzR81dhqG6eItS9OuPANNjJtkCTGJJjUEVlyqe+hDKV6DOuzhgLS3at+yD8aFK4 X-Received: by 2002:ac8:740b:: with SMTP id p11mr35095654qtq.75.1571102991659; Mon, 14 Oct 2019 18:29:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571102991; cv=none; d=google.com; s=arc-20160816; b=tSeDUXpsb/yi5VylUT5TTlCZwJ9xSAMJEkzxXOtVUaEKKZdJM91Hn1+rvTpWr7zY2z sNg3kMQ39tnnVcjzmojG5z6yHSyxVuOJRVcMivYP+PyomsCwIfXZk0uJCXhq+GDSlQv4 2kvYBj++bikS7OIrHR1JmBlqBCJGiwxSnKtQDRw8cVAUlMnRwtnsq/hF29WGyGKzM84n Rw0n55feEIBu0+i3JjqTFIFSV1g7/Jai8fgb51wNXpTqjB+Ezjh4WstxBgMIaYQZ1Rx6 r0gJ8CnGYvyEj7eA34Zb5ze53GW2eGFVcrg4Lz9V2fuasTQQFsjvZDHSM0ptHFBuk4El iJPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:message-id:date:subject:to:from :dkim-signature; bh=uV4GgIG9lLtnR/n38vsAmt8bgLODKyr1VTQJdCQjsA8=; b=LLFA/AhvfnnPAIoY0xxl+D77GuhYl869PM0/yLlddGJIOPcED+HFNohJU6VVDzyYK3 oJjCJykUxRvndNcZ5Xj+YEHSu+rg394IgRhnH2JiBlO5etvfZ6d5nwEszly4FDpW2mwV Ps+VpPSfpxNagacBXFfrtSwbMuACQ3U23CpgB6GyRT8l95yHhP5ADXD5EgjsJh+IH3aE OKBSseObU5SzyH0+BKJbJRFnnStb2tvX82jV/qDp5ela4OKkNx0ayzhCslLb9DJqR0A3 FIOn4X6PanGsjpACTqN0HnhYXzAODhPU6r2UYqUaS1VJYEGLX+sw6hSKz46/NdfnIfk9 DGbg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mMVRpRIB; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id z42si19593502qvg.83.2019.10.14.18.29.51 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 14 Oct 2019 18:29:51 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mMVRpRIB; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:59242 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iKBep-0005ay-6r for patch@linaro.org; Mon, 14 Oct 2019 21:29:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37219) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iKBef-0005aj-RO for qemu-devel@nongnu.org; Mon, 14 Oct 2019 21:29:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iKBee-0007Rf-FA for qemu-devel@nongnu.org; Mon, 14 Oct 2019 21:29:41 -0400 Received: from mail-pl1-x643.google.com ([2607:f8b0:4864:20::643]:45570) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iKBee-0007RB-9J for qemu-devel@nongnu.org; Mon, 14 Oct 2019 21:29:40 -0400 Received: by mail-pl1-x643.google.com with SMTP id u12so8746836pls.12 for ; Mon, 14 Oct 2019 18:29:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id; bh=uV4GgIG9lLtnR/n38vsAmt8bgLODKyr1VTQJdCQjsA8=; b=mMVRpRIBctieScsqgen4eLEQPAUFknpOrR83OFFFpalpJ8NS/1b3KCVYAcxcUSA9VH zN/r+V8R8AeGWptrzwLMoiTcXgQPUKd+vDnHD8a5GHfuM3SvtXePOyVVqfzwrgKcPe8i QOWlsU4cnX7v2Pl8SbYU2lLKylPMIzOAAAf6IQQ4M/SqIm4uAfgebzb2QDHJGlochMjG C+3fj8rn41U0uzSMQxca57Io7XDq7KEA0gTYPki/mi3LCFx7aKdA9CJDS7gEhor67SVv YbMLce34bZZlJevT8i0XQ/K56ySO2iToZqW/UinBGG59yNwaoDYBCtjBSMWK4LX0kVbO Q0pQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id; bh=uV4GgIG9lLtnR/n38vsAmt8bgLODKyr1VTQJdCQjsA8=; b=LTrOAn1qH0RZ3x2dr0esVt0YgZ6dqWPaBhs318Aai4TXRWPp19ToTBr4MGkaygWv1/ Xz44E35WtkWdeQt54OFlAeXON03ZNhfw5NGEpUuAWF+mk84aZLicV+5J/cSNSflqEJzK 32l7PIOqMlw74n9KVJxqZH4mAvU3SIp0cFXEQ8h9AEM0p9W7yORFaRSBRoMe/f3gaHaw SAdSqPhj2HKz4WQk0+DrDSv8xxcBnoo5UvsBrbixArwTIK/Hr+HzIYjZseyHWvLQencO j32jS2fyjHC+eFGQ/F5jmT5rD/q1bkvuEFEniOmtL3KEUO8XqH3mZ0Jc/+pvATIiipC2 sTnw== X-Gm-Message-State: APjAAAXUbn0GV5G2HtuJ7p/Ere0v7qxUkhIoXA/ZvBMmJdNhRqvdySNB PpRRBPM44EObOuI2+wqK80SgMOlTsWY= X-Received: by 2002:a17:902:b210:: with SMTP id t16mr31692093plr.250.1571102978364; Mon, 14 Oct 2019 18:29:38 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id x5sm5983703pfi.32.2019.10.14.18.29.37 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Oct 2019 18:29:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH] tcg/arm: Expand epilogue inline Date: Mon, 14 Oct 2019 18:29:36 -0700 Message-Id: <20191015012936.16275-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::643 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" It is, after all, just two instructions. Profiling on a cortex-a15, using -d nochain to increase the number of exit_tb that are executed, shows a minor improvement of 0.5%. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.inc.c | 32 +++++++++++++------------------- 1 file changed, 13 insertions(+), 19 deletions(-) -- 2.17.1 diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c index 94d80d79d1..2a9ebfe25a 100644 --- a/tcg/arm/tcg-target.inc.c +++ b/tcg/arm/tcg-target.inc.c @@ -1745,24 +1745,18 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64) #endif } -static tcg_insn_unit *tb_ret_addr; +static void tcg_out_epilogue(TCGContext *s); -static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, - const TCGArg *args, const int *const_args) +static void tcg_out_op(TCGContext *s, TCGOpcode opc, + const TCGArg *args, const int *const_args) { TCGArg a0, a1, a2, a3, a4, a5; int c; switch (opc) { case INDEX_op_exit_tb: - /* Reuse the zeroing that exists for goto_ptr. */ - a0 = args[0]; - if (a0 == 0) { - tcg_out_goto(s, COND_AL, s->code_gen_epilogue); - } else { - tcg_out_movi32(s, COND_AL, TCG_REG_R0, args[0]); - tcg_out_goto(s, COND_AL, tb_ret_addr); - } + tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R0, args[0]); + tcg_out_epilogue(s); break; case INDEX_op_goto_tb: { @@ -2284,19 +2278,17 @@ static void tcg_out_nop_fill(tcg_insn_unit *p, int count) + TCG_TARGET_STACK_ALIGN - 1) \ & -TCG_TARGET_STACK_ALIGN) +#define STACK_ADDEND (FRAME_SIZE - PUSH_SIZE) + static void tcg_target_qemu_prologue(TCGContext *s) { - int stack_addend; - /* Calling convention requires us to save r4-r11 and lr. */ /* stmdb sp!, { r4 - r11, lr } */ tcg_out32(s, (COND_AL << 28) | 0x092d4ff0); /* Reserve callee argument and tcg temp space. */ - stack_addend = FRAME_SIZE - PUSH_SIZE; - tcg_out_dat_rI(s, COND_AL, ARITH_SUB, TCG_REG_CALL_STACK, - TCG_REG_CALL_STACK, stack_addend, 1); + TCG_REG_CALL_STACK, STACK_ADDEND, 1); tcg_set_frame(s, TCG_REG_CALL_STACK, TCG_STATIC_CALL_ARGS_SIZE, CPU_TEMP_BUF_NLONGS * sizeof(long)); @@ -2310,11 +2302,13 @@ static void tcg_target_qemu_prologue(TCGContext *s) */ s->code_gen_epilogue = s->code_ptr; tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R0, 0); + tcg_out_epilogue(s); +} - /* TB epilogue */ - tb_ret_addr = s->code_ptr; +static void tcg_out_epilogue(TCGContext *s) +{ tcg_out_dat_rI(s, COND_AL, ARITH_ADD, TCG_REG_CALL_STACK, - TCG_REG_CALL_STACK, stack_addend, 1); + TCG_REG_CALL_STACK, STACK_ADDEND, 1); /* ldmia sp!, { r4 - r11, pc } */ tcg_out32(s, (COND_AL << 28) | 0x08bd8ff0);