| Message ID | 20191011155546.14342-10-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | target/arm: Reduce overhead of cpu_get_tb_cpu_state | expand |
Richard Henderson <richard.henderson@linaro.org> writes: > We do not need to compute any of these values for M-profile. > Further, XSCALE_CPAR overlaps VECSTRIDE so obviously the two > sets must be mutually exclusive. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> > --- > target/arm/helper.c | 21 ++++++++++++++------- > 1 file changed, 14 insertions(+), 7 deletions(-) > > diff --git a/target/arm/helper.c b/target/arm/helper.c > index ddd21edfcf..e2a62cf19a 100644 > --- a/target/arm/helper.c > +++ b/target/arm/helper.c > @@ -11235,21 +11235,28 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, > } > } else { > flags = rebuild_hflags_a32(env, fp_el, mmu_idx); > + > + /* > + * Note that XSCALE_CPAR shares bits with VECSTRIDE. > + * Note that VECLEN+VECSTRIDE are RES0 for M-profile. > + */ > + if (arm_feature(env, ARM_FEATURE_XSCALE)) { > + flags = FIELD_DP32(flags, TBFLAG_A32, > + XSCALE_CPAR, env->cp15.c15_cpar); > + } else { > + flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN, > + env->vfp.vec_len); > + flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE, > + env->vfp.vec_stride); > + } > } > > flags = FIELD_DP32(flags, TBFLAG_A32, THUMB, env->thumb); > - flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN, env->vfp.vec_len); > - flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE, env->vfp.vec_stride); > flags = FIELD_DP32(flags, TBFLAG_A32, CONDEXEC, env->condexec_bits); > if (env->vfp.xregs[ARM_VFP_FPEXC] & (1 << 30) > || arm_el_is_aa64(env, 1) || arm_feature(env, ARM_FEATURE_M)) { > flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1); > } > - /* Note that XSCALE_CPAR shares bits with VECSTRIDE */ > - if (arm_feature(env, ARM_FEATURE_XSCALE)) { > - flags = FIELD_DP32(flags, TBFLAG_A32, > - XSCALE_CPAR, env->cp15.c15_cpar); > - } > } > > /* The SS_ACTIVE and PSTATE_SS bits correspond to the state machine -- Alex Bennée
diff --git a/target/arm/helper.c b/target/arm/helper.c index ddd21edfcf..e2a62cf19a 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11235,21 +11235,28 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, } } else { flags = rebuild_hflags_a32(env, fp_el, mmu_idx); + + /* + * Note that XSCALE_CPAR shares bits with VECSTRIDE. + * Note that VECLEN+VECSTRIDE are RES0 for M-profile. + */ + if (arm_feature(env, ARM_FEATURE_XSCALE)) { + flags = FIELD_DP32(flags, TBFLAG_A32, + XSCALE_CPAR, env->cp15.c15_cpar); + } else { + flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN, + env->vfp.vec_len); + flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE, + env->vfp.vec_stride); + } } flags = FIELD_DP32(flags, TBFLAG_A32, THUMB, env->thumb); - flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN, env->vfp.vec_len); - flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE, env->vfp.vec_stride); flags = FIELD_DP32(flags, TBFLAG_A32, CONDEXEC, env->condexec_bits); if (env->vfp.xregs[ARM_VFP_FPEXC] & (1 << 30) || arm_el_is_aa64(env, 1) || arm_feature(env, ARM_FEATURE_M)) { flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1); } - /* Note that XSCALE_CPAR shares bits with VECSTRIDE */ - if (arm_feature(env, ARM_FEATURE_XSCALE)) { - flags = FIELD_DP32(flags, TBFLAG_A32, - XSCALE_CPAR, env->cp15.c15_cpar); - } } /* The SS_ACTIVE and PSTATE_SS bits correspond to the state machine
We do not need to compute any of these values for M-profile. Further, XSCALE_CPAR overlaps VECSTRIDE so obviously the two sets must be mutually exclusive. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/arm/helper.c | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) -- 2.17.1