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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id w7sm2863568pjn.1.2019.10.01.10.16.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2019 10:16:22 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 05/18] target/s390x: Push trigger_pgm_exception lower in s390_cpu_tlb_fill Date: Tue, 1 Oct 2019 10:16:01 -0700 Message-Id: <20191001171614.8405-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001171614.8405-1-richard.henderson@linaro.org> References: <20191001171614.8405-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::641 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Delay triggering an exception until the end, after we have determined ultimate success or failure, and also taken into account whether this is a non-faulting probe. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/excp_helper.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index dbff772d34..552098be5f 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -127,7 +127,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, CPUS390XState *env = &cpu->env; target_ulong vaddr, raddr; uint64_t asc; - int prot, fail; + int prot, fail, excp; qemu_log_mask(CPU_LOG_MMU, "%s: addr 0x%" VADDR_PRIx " rw %d mmu_idx %d\n", __func__, address, access_type, mmu_idx); @@ -141,12 +141,14 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, vaddr &= 0x7fffffff; } fail = mmu_translate(env, vaddr, access_type, asc, &raddr, &prot, true); + excp = 0; /* exception already raised */ } else if (mmu_idx == MMU_REAL_IDX) { /* 31-Bit mode */ if (!(env->psw.mask & PSW_MASK_64)) { vaddr &= 0x7fffffff; } fail = mmu_translate_real(env, vaddr, access_type, &raddr, &prot); + excp = 0; /* exception already raised */ } else { g_assert_not_reached(); } @@ -159,7 +161,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, qemu_log_mask(CPU_LOG_MMU, "%s: raddr %" PRIx64 " > ram_size %" PRIx64 "\n", __func__, (uint64_t)raddr, (uint64_t)ram_size); - trigger_pgm_exception(env, PGM_ADDRESSING, ILEN_AUTO); + excp = PGM_ADDRESSING; fail = 1; } @@ -175,6 +177,9 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, return false; } + if (excp) { + trigger_pgm_exception(env, excp, ILEN_AUTO); + } cpu_restore_state(cs, retaddr, true); /*