Message ID | 20190926162615.31168-8-richard.henderson@linaro.org |
---|---|
State | Superseded |
Headers | show |
Series | target/s390: Use tcg unwinding for ilen | expand |
On 26.09.19 18:26, Richard Henderson wrote: > As a step toward moving all excption handling out of mmu_translate, > copy handling of the LowCore tec value from trigger_access_exception > into s390_cpu_tlb_fill. So far this new plumbing isn't used. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/s390x/excp_helper.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c > index 552098be5f..ab2ed47fef 100644 > --- a/target/s390x/excp_helper.c > +++ b/target/s390x/excp_helper.c > @@ -126,7 +126,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, > S390CPU *cpu = S390_CPU(cs); > CPUS390XState *env = &cpu->env; > target_ulong vaddr, raddr; > - uint64_t asc; > + uint64_t asc, tec; > int prot, fail, excp; > > qemu_log_mask(CPU_LOG_MMU, "%s: addr 0x%" VADDR_PRIx " rw %d mmu_idx %d\n", > @@ -162,6 +162,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, > "%s: raddr %" PRIx64 " > ram_size %" PRIx64 "\n", > __func__, (uint64_t)raddr, (uint64_t)ram_size); > excp = PGM_ADDRESSING; > + tec = 0; /* unused */ > fail = 1; > } > > @@ -178,6 +179,10 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, > } > > if (excp) { > + if (excp != PGM_ADDRESSING) { > + stq_phys(env_cpu(env)->as, > + env->psa + offsetof(LowCore, trans_exc_code), tec); > + } > trigger_pgm_exception(env, excp, ILEN_AUTO); > } > cpu_restore_state(cs, retaddr, true); > Again, depends on what's going to follow next, but I have a rough idea already :) Reviewed-by: David Hildenbrand <david@redhat.com> -- Thanks, David / dhildenb
diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 552098be5f..ab2ed47fef 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -126,7 +126,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, S390CPU *cpu = S390_CPU(cs); CPUS390XState *env = &cpu->env; target_ulong vaddr, raddr; - uint64_t asc; + uint64_t asc, tec; int prot, fail, excp; qemu_log_mask(CPU_LOG_MMU, "%s: addr 0x%" VADDR_PRIx " rw %d mmu_idx %d\n", @@ -162,6 +162,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, "%s: raddr %" PRIx64 " > ram_size %" PRIx64 "\n", __func__, (uint64_t)raddr, (uint64_t)ram_size); excp = PGM_ADDRESSING; + tec = 0; /* unused */ fail = 1; } @@ -178,6 +179,10 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, } if (excp) { + if (excp != PGM_ADDRESSING) { + stq_phys(env_cpu(env)->as, + env->psa + offsetof(LowCore, trans_exc_code), tec); + } trigger_pgm_exception(env, excp, ILEN_AUTO); } cpu_restore_state(cs, retaddr, true);
As a step toward moving all excption handling out of mmu_translate, copy handling of the LowCore tec value from trigger_access_exception into s390_cpu_tlb_fill. So far this new plumbing isn't used. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/s390x/excp_helper.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) -- 2.17.1