diff mbox series

[6/7] target/alpha: Mask IOV exception with INV for user-only

Message ID 20190921043256.4575-7-richard.henderson@linaro.org
State Superseded
Headers show
Series target/alpha: Fix linux-user exception for CVTTQ | expand

Commit Message

Richard Henderson Sept. 21, 2019, 4:32 a.m. UTC
The kernel masks the integer overflow exception with the
software invalid exception mask.  Include IOV in the set
of exception bits masked by fpcr_exc_enable.

Fixes the new float_convs test.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/alpha/helper.c | 7 +++++++
 1 file changed, 7 insertions(+)

-- 
2.17.1

Comments

Alex Bennée Sept. 23, 2019, 4:39 p.m. UTC | #1
Richard Henderson <richard.henderson@linaro.org> writes:

> The kernel masks the integer overflow exception with the

> software invalid exception mask.  Include IOV in the set

> of exception bits masked by fpcr_exc_enable.

>

> Fixes the new float_convs test.

>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

Tested-by: Alex Bennée <alex.bennee@linaro.org>


> ---

>  target/alpha/helper.c | 7 +++++++

>  1 file changed, 7 insertions(+)

>

> diff --git a/target/alpha/helper.c b/target/alpha/helper.c

> index 1b3479738b..55d7274d94 100644

> --- a/target/alpha/helper.c

> +++ b/target/alpha/helper.c

> @@ -58,6 +58,13 @@ void cpu_alpha_store_fpcr(CPUAlphaState *env, uint64_t val)

>       */

>      uint32_t soft_fpcr = alpha_ieee_swcr_to_fpcr(env->swcr) >> 32;

>      fpcr |= soft_fpcr & (FPCR_STATUS_MASK | FPCR_DNZ);

> +

> +    /*

> +     * The IOV exception is disabled by the kernel with SWCR_TRAP_ENABLE_INV,

> +     * which got mapped by alpha_ieee_swcr_to_fpcr to FPCR_INVD.

> +     * Add FPCR_IOV to fpcr_exc_enable so that it is handled identically.

> +     */

> +    t |= CONVERT_BIT(soft_fpcr, FPCR_INVD, FPCR_IOV);

>  #endif

>

>      t |= CONVERT_BIT(fpcr, FPCR_INED, FPCR_INE);



--
Alex Bennée
diff mbox series

Patch

diff --git a/target/alpha/helper.c b/target/alpha/helper.c
index 1b3479738b..55d7274d94 100644
--- a/target/alpha/helper.c
+++ b/target/alpha/helper.c
@@ -58,6 +58,13 @@  void cpu_alpha_store_fpcr(CPUAlphaState *env, uint64_t val)
      */
     uint32_t soft_fpcr = alpha_ieee_swcr_to_fpcr(env->swcr) >> 32;
     fpcr |= soft_fpcr & (FPCR_STATUS_MASK | FPCR_DNZ);
+
+    /*
+     * The IOV exception is disabled by the kernel with SWCR_TRAP_ENABLE_INV,
+     * which got mapped by alpha_ieee_swcr_to_fpcr to FPCR_INVD.
+     * Add FPCR_IOV to fpcr_exc_enable so that it is handled identically.
+     */
+    t |= CONVERT_BIT(soft_fpcr, FPCR_INVD, FPCR_IOV);
 #endif
 
     t |= CONVERT_BIT(fpcr, FPCR_INED, FPCR_INE);