@@ -38,7 +38,7 @@ static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
release_lock |= prepare_mmio_access(mr);
/* I/O case */
- r = memory_region_dispatch_read(mr, addr1, &val, size_memop(4), attrs);
+ r = memory_region_dispatch_read(mr, addr1, &val, MO_32, attrs);
#if defined(TARGET_WORDS_BIGENDIAN)
if (endian == DEVICE_LITTLE_ENDIAN) {
val = bswap32(val);
@@ -114,7 +114,7 @@ static inline uint64_t glue(address_space_ldq_internal, SUFFIX)(ARG1_DECL,
release_lock |= prepare_mmio_access(mr);
/* I/O case */
- r = memory_region_dispatch_read(mr, addr1, &val, size_memop(8), attrs);
+ r = memory_region_dispatch_read(mr, addr1, &val, MO_64, attrs);
#if defined(TARGET_WORDS_BIGENDIAN)
if (endian == DEVICE_LITTLE_ENDIAN) {
val = bswap64(val);
@@ -188,7 +188,7 @@ uint32_t glue(address_space_ldub, SUFFIX)(ARG1_DECL,
release_lock |= prepare_mmio_access(mr);
/* I/O case */
- r = memory_region_dispatch_read(mr, addr1, &val, size_memop(1), attrs);
+ r = memory_region_dispatch_read(mr, addr1, &val, MO_8, attrs);
} else {
/* RAM case */
ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
@@ -224,7 +224,7 @@ static inline uint32_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL,
release_lock |= prepare_mmio_access(mr);
/* I/O case */
- r = memory_region_dispatch_read(mr, addr1, &val, size_memop(2), attrs);
+ r = memory_region_dispatch_read(mr, addr1, &val, MO_16, attrs);
#if defined(TARGET_WORDS_BIGENDIAN)
if (endian == DEVICE_LITTLE_ENDIAN) {
val = bswap16(val);
@@ -300,7 +300,7 @@ void glue(address_space_stl_notdirty, SUFFIX)(ARG1_DECL,
if (l < 4 || !memory_access_is_direct(mr, true)) {
release_lock |= prepare_mmio_access(mr);
- r = memory_region_dispatch_write(mr, addr1, val, size_memop(4), attrs);
+ r = memory_region_dispatch_write(mr, addr1, val, MO_32, attrs);
} else {
ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
stl_p(ptr, val);
@@ -346,7 +346,7 @@ static inline void glue(address_space_stl_internal, SUFFIX)(ARG1_DECL,
val = bswap32(val);
}
#endif
- r = memory_region_dispatch_write(mr, addr1, val, size_memop(4), attrs);
+ r = memory_region_dispatch_write(mr, addr1, val, MO_32, attrs);
} else {
/* RAM case */
ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
@@ -408,7 +408,7 @@ void glue(address_space_stb, SUFFIX)(ARG1_DECL,
mr = TRANSLATE(addr, &addr1, &l, true, attrs);
if (!memory_access_is_direct(mr, true)) {
release_lock |= prepare_mmio_access(mr);
- r = memory_region_dispatch_write(mr, addr1, val, size_memop(1), attrs);
+ r = memory_region_dispatch_write(mr, addr1, val, MO_8, attrs);
} else {
/* RAM case */
ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
@@ -451,7 +451,7 @@ static inline void glue(address_space_stw_internal, SUFFIX)(ARG1_DECL,
val = bswap16(val);
}
#endif
- r = memory_region_dispatch_write(mr, addr1, val, size_memop(2), attrs);
+ r = memory_region_dispatch_write(mr, addr1, val, MO_16, attrs);
} else {
/* RAM case */
ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
@@ -524,7 +524,7 @@ static void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
val = bswap64(val);
}
#endif
- r = memory_region_dispatch_write(mr, addr1, val, size_memop(8), attrs);
+ r = memory_region_dispatch_write(mr, addr1, val, MO_64, attrs);
} else {
/* RAM case */
ptr = qemu_map_ram_ptr(mr->ram_block, addr1);