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[209.51.188.17]) by mx.google.com with ESMTPS id w11si1043243qtb.285.2019.08.28.23.16.11 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 28 Aug 2019 23:16:11 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@gibson.dropbear.id.au header.s=201602 header.b="Gb+bR/sc"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:45710 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i3Dj8-0002rS-Tq for patch@linaro.org; Thu, 29 Aug 2019 02:16:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35339) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i3Dc4-0004Ha-6Y for qemu-devel@nongnu.org; Thu, 29 Aug 2019 02:08:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i3Dc0-0003k4-Va for qemu-devel@nongnu.org; Thu, 29 Aug 2019 02:08:51 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:37669) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1i3Dc0-0003hE-Gf; Thu, 29 Aug 2019 02:08:48 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 46JscN43Btz9sPW; Thu, 29 Aug 2019 16:08:36 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1567058916; bh=5mQwvfr4PUb7F3Lqz+iL3Cu6DH/GE0yuK6gqDqjf7X0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Gb+bR/scI0adyeyB99Zi8Vqw5vNzFyn5k392Pb3SYcnYtzjk/c+sa6jKfvpqYeEKc G1NpMWvdai+T5O/lMtR7pnFt3tF2GSfl188ZRHnA64JqCvm+l1ha9LgOTJjhELqrQ+ DVVn4b29wChTOgf3B3Yd+jVnmzpusRuiqnjNJz7g= From: David Gibson To: peter.maydell@linaro.org Date: Thu, 29 Aug 2019 16:08:20 +1000 Message-Id: <20190829060827.25731-13-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190829060827.25731-1-david@gibson.dropbear.id.au> References: <20190829060827.25731-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 12/19] target/ppc: Fix do_float_check_status vs inexact X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, aik@ozlabs.ru, Richard Henderson , groug@kaod.org, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, Paul Clarke , David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson The underflow and inexact exceptions are not mutually exclusive. Check for both of them. Tidy the reset of FPSCR[FI]. Fixes: https://bugs.launchpad.net/bugs/1841442 Reported-by: Paul Clarke Signed-off-by: Richard Henderson Tested-by: Paul Clarke Message-Id: <20190826165434.18403-2-richard.henderson@linaro.org> Signed-off-by: David Gibson --- target/ppc/fpu_helper.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) -- 2.21.0 diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index c8e719272d..4b1a2e6178 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -630,19 +630,15 @@ static void do_float_check_status(CPUPPCState *env, uintptr_t raddr) { CPUState *cs = env_cpu(env); int status = get_float_exception_flags(&env->fp_status); - bool inexact_happened = false; if (status & float_flag_overflow) { float_overflow_excp(env); } else if (status & float_flag_underflow) { float_underflow_excp(env); - } else if (status & float_flag_inexact) { - float_inexact_excp(env); - inexact_happened = true; } - - /* if the inexact flag was not set */ - if (inexact_happened == false) { + if (status & float_flag_inexact) { + float_inexact_excp(env); + } else { env->fpscr &= ~(1 << FPSCR_FI); /* clear the FPSCR[FI] bit */ }