diff mbox series

[v5,13/17] target/arm: Split out arm_mmu_idx_el

Message ID 20190820210720.18976-14-richard.henderson@linaro.org
State New
Headers show
Series target/arm: Reduce overhead of cpu_get_tb_cpu_state | expand

Commit Message

Richard Henderson Aug. 20, 2019, 9:07 p.m. UTC
Avoid calling arm_current_el() twice.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/arm/internals.h |  9 +++++++++
 target/arm/helper.c    | 12 +++++++-----
 2 files changed, 16 insertions(+), 5 deletions(-)

-- 
2.17.1

Comments

Philippe Mathieu-Daudé Sept. 6, 2019, 7:12 a.m. UTC | #1
On 8/20/19 11:07 PM, Richard Henderson wrote:
> Avoid calling arm_current_el() twice.

> 

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>


> ---

>  target/arm/internals.h |  9 +++++++++

>  target/arm/helper.c    | 12 +++++++-----

>  2 files changed, 16 insertions(+), 5 deletions(-)

> 

> diff --git a/target/arm/internals.h b/target/arm/internals.h

> index 232d963875..f5313dd3d4 100644

> --- a/target/arm/internals.h

> +++ b/target/arm/internals.h

> @@ -949,6 +949,15 @@ void arm_cpu_update_virq(ARMCPU *cpu);

>   */

>  void arm_cpu_update_vfiq(ARMCPU *cpu);

>  

> +/**

> + * arm_mmu_idx_el:

> + * @env: The cpu environment

> + * @el: The EL to use.

> + *

> + * Return the full ARMMMUIdx for the translation regime for EL.

> + */

> +ARMMMUIdx arm_mmu_idx_el(CPUARMState *env, int el);

> +

>  /**

>   * arm_mmu_idx:

>   * @env: The cpu environment

> diff --git a/target/arm/helper.c b/target/arm/helper.c

> index 83ae33dae5..19bdb9b9d6 100644

> --- a/target/arm/helper.c

> +++ b/target/arm/helper.c

> @@ -10988,15 +10988,12 @@ ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, bool secstate)

>  }

>  #endif

>  

> -ARMMMUIdx arm_mmu_idx(CPUARMState *env)

> +ARMMMUIdx arm_mmu_idx_el(CPUARMState *env, int el)

>  {

> -    int el;

> -

>      if (arm_feature(env, ARM_FEATURE_M)) {

>          return arm_v7m_mmu_idx_for_secstate(env, env->v7m.secure);

>      }

>  

> -    el = arm_current_el(env);

>      if (el < 2 && arm_is_secure_below_el3(env)) {

>          return ARMMMUIdx_S1SE0 + el;

>      } else {

> @@ -11004,6 +11001,11 @@ ARMMMUIdx arm_mmu_idx(CPUARMState *env)

>      }

>  }

>  

> +ARMMMUIdx arm_mmu_idx(CPUARMState *env)

> +{

> +    return arm_mmu_idx_el(env, arm_current_el(env));

> +}

> +

>  int cpu_mmu_index(CPUARMState *env, bool ifetch)

>  {

>      return arm_to_core_mmu_idx(arm_mmu_idx(env));

> @@ -11164,7 +11166,7 @@ static uint32_t rebuild_hflags_internal(CPUARMState *env)

>  {

>      int el = arm_current_el(env);

>      int fp_el = fp_exception_el(env, el);

> -    ARMMMUIdx mmu_idx = arm_mmu_idx(env);

> +    ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, el);

>  

>      if (is_a64(env)) {

>          return rebuild_hflags_a64(env, el, fp_el, mmu_idx);

>
diff mbox series

Patch

diff --git a/target/arm/internals.h b/target/arm/internals.h
index 232d963875..f5313dd3d4 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -949,6 +949,15 @@  void arm_cpu_update_virq(ARMCPU *cpu);
  */
 void arm_cpu_update_vfiq(ARMCPU *cpu);
 
+/**
+ * arm_mmu_idx_el:
+ * @env: The cpu environment
+ * @el: The EL to use.
+ *
+ * Return the full ARMMMUIdx for the translation regime for EL.
+ */
+ARMMMUIdx arm_mmu_idx_el(CPUARMState *env, int el);
+
 /**
  * arm_mmu_idx:
  * @env: The cpu environment
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 83ae33dae5..19bdb9b9d6 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -10988,15 +10988,12 @@  ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, bool secstate)
 }
 #endif
 
-ARMMMUIdx arm_mmu_idx(CPUARMState *env)
+ARMMMUIdx arm_mmu_idx_el(CPUARMState *env, int el)
 {
-    int el;
-
     if (arm_feature(env, ARM_FEATURE_M)) {
         return arm_v7m_mmu_idx_for_secstate(env, env->v7m.secure);
     }
 
-    el = arm_current_el(env);
     if (el < 2 && arm_is_secure_below_el3(env)) {
         return ARMMMUIdx_S1SE0 + el;
     } else {
@@ -11004,6 +11001,11 @@  ARMMMUIdx arm_mmu_idx(CPUARMState *env)
     }
 }
 
+ARMMMUIdx arm_mmu_idx(CPUARMState *env)
+{
+    return arm_mmu_idx_el(env, arm_current_el(env));
+}
+
 int cpu_mmu_index(CPUARMState *env, bool ifetch)
 {
     return arm_to_core_mmu_idx(arm_mmu_idx(env));
@@ -11164,7 +11166,7 @@  static uint32_t rebuild_hflags_internal(CPUARMState *env)
 {
     int el = arm_current_el(env);
     int fp_el = fp_exception_el(env, el);
-    ARMMMUIdx mmu_idx = arm_mmu_idx(env);
+    ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, el);
 
     if (is_a64(env)) {
         return rebuild_hflags_a64(env, el, fp_el, mmu_idx);