| Message ID | 20190819213755.26175-37-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | target/arm: Convert aa32 base isa to decodetree | expand |
On 8/19/19 11:37 PM, Richard Henderson wrote: > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/arm/translate.c | 22 +++++++++++++--------- > target/arm/a32-uncond.decode | 4 ++++ > 2 files changed, 17 insertions(+), 9 deletions(-) > > diff --git a/target/arm/translate.c b/target/arm/translate.c > index 928205d993..46e88d1d17 100644 > --- a/target/arm/translate.c > +++ b/target/arm/translate.c > @@ -10124,6 +10124,18 @@ static bool trans_SB(DisasContext *s, arg_SB *a) > return true; > } > > +static bool trans_SETEND(DisasContext *s, arg_SETEND *a) > +{ > + if (!ENABLE_ARCH_6) { > + return false; > + } > + if (a->E != (s->be_data == MO_BE)) { :) Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> > + gen_helper_setend(cpu_env); > + s->base.is_jmp = DISAS_UPDATE; > + } > + return true; > +} > + > /* > * Legacy decoder. > */ > @@ -10209,15 +10221,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) > return; /* v7MP: Unallocated memory hint: must NOP */ > } > > - if ((insn & 0x0ffffdff) == 0x01010000) { > - ARCH(6); > - /* setend */ > - if (((insn >> 9) & 1) != !!(s->be_data == MO_BE)) { > - gen_helper_setend(cpu_env); > - s->base.is_jmp = DISAS_UPDATE; > - } > - return; > - } else if ((insn & 0x0e000f00) == 0x0c000100) { > + if ((insn & 0x0e000f00) == 0x0c000100) { > if (arm_dc_feature(s, ARM_FEATURE_IWMMXT)) { > /* iWMMXt register transfer. */ > if (extract32(s->c15_cpar, 1, 1)) { > diff --git a/target/arm/a32-uncond.decode b/target/arm/a32-uncond.decode > index eb1c55b330..d5ed48f0fd 100644 > --- a/target/arm/a32-uncond.decode > +++ b/target/arm/a32-uncond.decode > @@ -24,6 +24,7 @@ > > &empty !extern > &i !extern imm > +&setend E > > # Branch with Link and Exchange > > @@ -50,3 +51,6 @@ DSB 1111 0101 0111 1111 1111 0000 0100 ---- > DMB 1111 0101 0111 1111 1111 0000 0101 ---- > ISB 1111 0101 0111 1111 1111 0000 0110 ---- > SB 1111 0101 0111 1111 1111 0000 0111 0000 > + > +# Set Endianness > +SETEND 1111 0001 0000 0001 0000 00 E:1 0 0000 0000 &setend >
diff --git a/target/arm/translate.c b/target/arm/translate.c index 928205d993..46e88d1d17 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -10124,6 +10124,18 @@ static bool trans_SB(DisasContext *s, arg_SB *a) return true; } +static bool trans_SETEND(DisasContext *s, arg_SETEND *a) +{ + if (!ENABLE_ARCH_6) { + return false; + } + if (a->E != (s->be_data == MO_BE)) { + gen_helper_setend(cpu_env); + s->base.is_jmp = DISAS_UPDATE; + } + return true; +} + /* * Legacy decoder. */ @@ -10209,15 +10221,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) return; /* v7MP: Unallocated memory hint: must NOP */ } - if ((insn & 0x0ffffdff) == 0x01010000) { - ARCH(6); - /* setend */ - if (((insn >> 9) & 1) != !!(s->be_data == MO_BE)) { - gen_helper_setend(cpu_env); - s->base.is_jmp = DISAS_UPDATE; - } - return; - } else if ((insn & 0x0e000f00) == 0x0c000100) { + if ((insn & 0x0e000f00) == 0x0c000100) { if (arm_dc_feature(s, ARM_FEATURE_IWMMXT)) { /* iWMMXt register transfer. */ if (extract32(s->c15_cpar, 1, 1)) { diff --git a/target/arm/a32-uncond.decode b/target/arm/a32-uncond.decode index eb1c55b330..d5ed48f0fd 100644 --- a/target/arm/a32-uncond.decode +++ b/target/arm/a32-uncond.decode @@ -24,6 +24,7 @@ &empty !extern &i !extern imm +&setend E # Branch with Link and Exchange @@ -50,3 +51,6 @@ DSB 1111 0101 0111 1111 1111 0000 0100 ---- DMB 1111 0101 0111 1111 1111 0000 0101 ---- ISB 1111 0101 0111 1111 1111 0000 0110 ---- SB 1111 0101 0111 1111 1111 0000 0111 0000 + +# Set Endianness +SETEND 1111 0001 0000 0001 0000 00 E:1 0 0000 0000 &setend
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/arm/translate.c | 22 +++++++++++++--------- target/arm/a32-uncond.decode | 4 ++++ 2 files changed, 17 insertions(+), 9 deletions(-) -- 2.17.1