diff mbox series

[v3,12/13] target/riscv: rationalise softfloat includes

Message ID 20190813124946.25322-13-alex.bennee@linaro.org
State Superseded
Headers show
Series softfloat updates (include tweaks, rm LIT64) | expand

Commit Message

Alex Bennée Aug. 13, 2019, 12:49 p.m. UTC 
We should avoid including the whole of softfloat headers in cpu.h and
explicitly include it only where we will be calling softfloat
functions. We can use the -types.h and -helpers.h in cpu.h for the few
bits that are global.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

---
 target/riscv/cpu.c        | 1 +
 target/riscv/cpu.h        | 2 +-
 target/riscv/fpu_helper.c | 1 +
 3 files changed, 3 insertions(+), 1 deletion(-)

-- 
2.20.1

Comments

Philippe Mathieu-Daudé Aug. 13, 2019, 1:05 p.m. UTC | #1 
On 8/13/19 2:49 PM, Alex Bennée wrote:
> We should avoid including the whole of softfloat headers in cpu.h and

> explicitly include it only where we will be calling softfloat

> functions. We can use the -types.h and -helpers.h in cpu.h for the few

> bits that are global.

> 

> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>


Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>


> ---

>  target/riscv/cpu.c        | 1 +

>  target/riscv/cpu.h        | 2 +-

>  target/riscv/fpu_helper.c | 1 +

>  3 files changed, 3 insertions(+), 1 deletion(-)

> 

> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c

> index f8d07bd20ad..6d52f97d7c3 100644

> --- a/target/riscv/cpu.c

> +++ b/target/riscv/cpu.c

> @@ -27,6 +27,7 @@

>  #include "qemu/error-report.h"

>  #include "hw/qdev-properties.h"

>  #include "migration/vmstate.h"

> +#include "fpu/softfloat-helpers.h"

>  

>  /* RISC-V CPU definitions */

>  

> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h

> index 0adb307f329..240b31e2ebb 100644

> --- a/target/riscv/cpu.h

> +++ b/target/riscv/cpu.h

> @@ -22,7 +22,7 @@

>  

>  #include "qom/cpu.h"

>  #include "exec/cpu-defs.h"

> -#include "fpu/softfloat.h"

> +#include "fpu/softfloat-types.h"

>  

>  #define TCG_GUEST_DEFAULT_MO 0

>  

> diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c

> index b4f818a6465..0b79562a690 100644

> --- a/target/riscv/fpu_helper.c

> +++ b/target/riscv/fpu_helper.c

> @@ -21,6 +21,7 @@

>  #include "qemu/host-utils.h"

>  #include "exec/exec-all.h"

>  #include "exec/helper-proto.h"

> +#include "fpu/softfloat.h"

>  

>  target_ulong riscv_cpu_get_fflags(CPURISCVState *env)

>  {

>
diff mbox series

Patch

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index f8d07bd20ad..6d52f97d7c3 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -27,6 +27,7 @@ 
 #include "qemu/error-report.h"
 #include "hw/qdev-properties.h"
 #include "migration/vmstate.h"
+#include "fpu/softfloat-helpers.h"
 
 /* RISC-V CPU definitions */
 
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 0adb307f329..240b31e2ebb 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -22,7 +22,7 @@ 
 
 #include "qom/cpu.h"
 #include "exec/cpu-defs.h"
-#include "fpu/softfloat.h"
+#include "fpu/softfloat-types.h"
 
 #define TCG_GUEST_DEFAULT_MO 0
 
diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c
index b4f818a6465..0b79562a690 100644
--- a/target/riscv/fpu_helper.c
+++ b/target/riscv/fpu_helper.c
@@ -21,6 +21,7 @@ 
 #include "qemu/host-utils.h"
 #include "exec/exec-all.h"
 #include "exec/helper-proto.h"
+#include "fpu/softfloat.h"
 
 target_ulong riscv_cpu_get_fflags(CPURISCVState *env)
 {