From patchwork Fri Aug 9 09:19:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 170902 Delivered-To: patch@linaro.org Received: by 2002:a92:512:0:0:0:0:0 with SMTP id q18csp9736439ile; Fri, 9 Aug 2019 02:23:35 -0700 (PDT) X-Google-Smtp-Source: APXvYqzQzfC98nxctBEghsaGHdSA+Wb+VolA37tBJR3mmt2iwlfuq3CSCwsSNXSm5OnqwYdVG9v3 X-Received: by 2002:a17:906:d201:: with SMTP id w1mr9260525ejz.303.1565342615600; Fri, 09 Aug 2019 02:23:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1565342615; cv=none; d=google.com; s=arc-20160816; b=U5crmeSzk9Vu2Ax+8/ROrMhV4Cs3xul9I2bV7KxPFaXlErqfFGwEXfToI8+1M5zix8 3dT+N1B1VGwfp/sz1Sc3ThM/pnWMJmaOzdvm3CrYAziM5ROqoSyFn8PI3PO547tKlUK2 BR7J66nihPLF5rIiKQ7xEuIjq2Jmg98KDGC9Xo7T47/qncl5hWofWS+OTwBNftiEZoXl O+edvXkAw7N6XkBg323BkRtCUCafp+oH4SJbVpQADZFjo9h6ISuWKn1FyXjCbXYBnzUA 3gMqeUjZxGrtiYnEwBIHPoUoYh6e9f4vD7mihnY7oIaY3Ogi+M6idsr/d2RKP6ls8SoR Z2dg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=pH6yorJSkceA3ksBNVomDICRxgnjhzqlXkTAbU0+vbc=; b=qu+ZCURgSP8hStMoBnkE2qvWMuroFmDzSCxNHRcY0Bxmc+UbwsISwNbrUCEkEObgaR 6Vm4CSrVN1zHSq1BdQiktdQTNt7zGwAUwLK8gtEv8UWGm+mLe8RYeWoZOGuUkrk9KVEz 12pPThE76GCdiDtMIAmeOXuBln8609BMN5BibhUeONdGQxaqEt8mzw8ZMRhLG1/W9x0x s/qEOfOkjmdbKUBYEYDKflTT7j8ZUDKMkeBWa7XzpTQ9qQwSLUid20i1+QH5mZ1uEhq9 M3RLQjDZ2AsBxLVlv116+Gt46xUCuvZxVs1a2jWlFOlRuf2i51uggeSI6rYoX3hFhyrN 3ktA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="x/BNiUQz"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id v5si31842105eja.80.2019.08.09.02.23.35 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Aug 2019 02:23:35 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="x/BNiUQz"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:57608 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hw17W-0005F1-LR for patch@linaro.org; Fri, 09 Aug 2019 05:23:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48094) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hw13s-000617-Vd for qemu-devel@nongnu.org; Fri, 09 Aug 2019 05:19:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hw13r-0007f9-RK for qemu-devel@nongnu.org; Fri, 09 Aug 2019 05:19:48 -0400 Received: from mail-wm1-x344.google.com ([2a00:1450:4864:20::344]:52109) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hw13r-0007e9-Ki for qemu-devel@nongnu.org; Fri, 09 Aug 2019 05:19:47 -0400 Received: by mail-wm1-x344.google.com with SMTP id 207so4988819wma.1 for ; Fri, 09 Aug 2019 02:19:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pH6yorJSkceA3ksBNVomDICRxgnjhzqlXkTAbU0+vbc=; b=x/BNiUQzc0YrqGXyzZG3EF3SNKeDkn9sPFKWkj0CqUHXxg12JF2xdeGcFCmOlFgzbD P8NpEYutEUxYMi6tw3p5BdVsunTJPK6VVbkNB1CIxlr7Ge0c3PZiB0nCbaR5i9ymnq9o Vgr6tlkn13fs69Rm8a/nOKospOI6s3lnie5BE8qlAK6HseIg33ZkT7NI3teAH+q+qyOS FZ57kcKuWcDcuOpc1JE3dsKnXfPF17z4s13RYcbFnSHeuBDeKCn9qmxERQwklU7ByyYW smChdcp1b7Re2GxHKZiEZVzDxWaL4sMi3zAExFNlLRY1OmJepBCoTAlTkpj+DoxBs1qD sxEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pH6yorJSkceA3ksBNVomDICRxgnjhzqlXkTAbU0+vbc=; b=ouCCfl6jYeKiDTDSGvxLq2rKhoNS6Ene/+JMe/gHNQswUSxt65NsenmGHbQFO7bvML oXIwDVPix1fiX5KyyOpz7BA7LHWtL6QQSJifI0pBZ8dyGAc4DDO6E//gDedpIzgcfipC FlefA7ctQvVSh6h9XUaa209kqHUHlSwelZA/twEHOcYhU5bRz1x+qdKxBI0ggzr3G74L LUb8TVm6PD0YCjAetURNmcDZmqxL6lA60VxWNOqEKDwjk2Ayvn/LICe8QjkeBiG1MTg2 50PKIMJ5h6zmnpNI+zDJmmwsokleO2bFcmsnp/NWxKKtEKw4mFQifxznbWw2nQM6vYoU pSow== X-Gm-Message-State: APjAAAX9k5mVXwco3JrAOd3s//Dh0zYLJAdTO509G15BeXwD/C3dOinP pnBD+/iWUbJqaGSGw8G+WACRcw== X-Received: by 2002:a1c:721a:: with SMTP id n26mr1142246wmc.88.1565342386500; Fri, 09 Aug 2019 02:19:46 -0700 (PDT) Received: from zen.linaroharston ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id c1sm5763943wmc.40.2019.08.09.02.19.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Aug 2019 02:19:43 -0700 (PDT) Received: from zen.linaroharston. (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 57FBA1FF92; Fri, 9 Aug 2019 10:19:41 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Date: Fri, 9 Aug 2019 10:19:38 +0100 Message-Id: <20190809091940.1223-6-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190809091940.1223-1-alex.bennee@linaro.org> References: <20190809091940.1223-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::344 Subject: [Qemu-devel] [PATCH v2 5/7] target/mips: rationalise softfloat includes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aleksandar Rikalo , Riku Voipio , armbru@redhat.com, Laurent Vivier , Aleksandar Markovic , =?utf-8?q?Alex_Benn=C3=A9e?= , Aurelien Jarno Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We should avoid including the whole of softfloat headers in cpu.h and explicitly include it only where we will be calling softfloat functions. We can use the -types.h in cpu.h for the few bits that are global. We also move the restore_snan_bit_mode into internal.h and include -helpers.h there. Signed-off-by: Alex Bennée --- v2 - move restore_snan_bit_mode to internal.h --- linux-user/mips/cpu_loop.c | 1 + target/mips/cpu.h | 8 +------- target/mips/internal.h | 7 +++++++ target/mips/msa_helper.c | 1 + target/mips/op_helper.c | 1 + 5 files changed, 11 insertions(+), 7 deletions(-) -- 2.20.1 Reviewed-by: Aleksandar Markovic diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c index 0ba894fa7aa..39915b3fde2 100644 --- a/linux-user/mips/cpu_loop.c +++ b/linux-user/mips/cpu_loop.c @@ -22,6 +22,7 @@ #include "qemu.h" #include "cpu_loop-common.h" #include "elf.h" +#include "internal.h" # ifdef TARGET_ABI_MIPSO32 # define MIPS_SYS(name, args) args, diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 21c0615e020..d235117dab3 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -5,7 +5,7 @@ #include "cpu-qom.h" #include "exec/cpu-defs.h" -#include "fpu/softfloat.h" +#include "fpu/softfloat-types.h" #include "mips-defs.h" #define TCG_GUEST_DEFAULT_MO (0) @@ -1195,12 +1195,6 @@ void itc_reconfigure(struct MIPSITUState *tag); /* helper.c */ target_ulong exception_resume_pc(CPUMIPSState *env); -static inline void restore_snan_bit_mode(CPUMIPSState *env) -{ - set_snan_bit_is_one((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) == 0, - &env->active_fpu.fp_status); -} - static inline void cpu_get_tb_cpu_state(CPUMIPSState *env, target_ulong *pc, target_ulong *cs_base, uint32_t *flags) { diff --git a/target/mips/internal.h b/target/mips/internal.h index b2b41a51ab4..49a7a7d8f56 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -7,6 +7,7 @@ #ifndef MIPS_INTERNAL_H #define MIPS_INTERNAL_H +#include "fpu/softfloat-helpers.h" /* MMU types, the first four entries have the same layout as the CP0C0_MT field. */ @@ -226,6 +227,12 @@ static inline void restore_flush_mode(CPUMIPSState *env) &env->active_fpu.fp_status); } +static inline void restore_snan_bit_mode(CPUMIPSState *env) +{ + set_snan_bit_is_one((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) == 0, + &env->active_fpu.fp_status); +} + static inline void restore_fp_status(CPUMIPSState *env) { restore_rounding_mode(env); diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c index a5a86572b4a..f24061e2af7 100644 --- a/target/mips/msa_helper.c +++ b/target/mips/msa_helper.c @@ -22,6 +22,7 @@ #include "internal.h" #include "exec/exec-all.h" #include "exec/helper-proto.h" +#include "fpu/softfloat.h" /* Data format min and max values */ #define DF_BITS(df) (1 << ((df) + 3)) diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c index 9e2e02f8586..f88a3ab9043 100644 --- a/target/mips/op_helper.c +++ b/target/mips/op_helper.c @@ -25,6 +25,7 @@ #include "exec/exec-all.h" #include "exec/cpu_ldst.h" #include "sysemu/kvm.h" +#include "fpu/softfloat.h" /*****************************************************************************/ /* Exceptions processing helpers */