diff mbox series

[for-4.2,10/24] target/arm: Update CNTVCT_EL0 for VHE

Message ID 20190719210326.15466-11-richard.henderson@linaro.org
State Superseded
Headers show
Series target/arm: Implement ARMv8.1-VHE | expand

Commit Message

Richard Henderson July 19, 2019, 9:03 p.m. UTC
The virtual offset may be 0 depending on EL, E2H and TGE.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/arm/helper.c | 40 +++++++++++++++++++++++++++++++++++++---
 1 file changed, 37 insertions(+), 3 deletions(-)

-- 
2.17.1

Comments

Alex Bennée July 24, 2019, 2:47 p.m. UTC | #1
Richard Henderson <richard.henderson@linaro.org> writes:

> The virtual offset may be 0 depending on EL, E2H and TGE.

>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Reviewed-by: Alex Bennée <alex.bennee@linaro.org>


> ---

>  target/arm/helper.c | 40 +++++++++++++++++++++++++++++++++++++---

>  1 file changed, 37 insertions(+), 3 deletions(-)

>

> diff --git a/target/arm/helper.c b/target/arm/helper.c

> index da2e0627b2..3124d682a2 100644

> --- a/target/arm/helper.c

> +++ b/target/arm/helper.c

> @@ -2484,9 +2484,31 @@ static uint64_t gt_cnt_read(CPUARMState *env, const ARMCPRegInfo *ri)

>      return gt_get_countervalue(env);

>  }

>

> +static uint64_t gt_virt_cnt_offset(CPUARMState *env)

> +{

> +    uint64_t hcr;

> +

> +    switch (arm_current_el(env)) {

> +    case 2:

> +        hcr = arm_hcr_el2_eff(env);

> +        if (hcr & HCR_E2H) {

> +            return 0;

> +        }

> +        break;

> +    case 0:

> +        hcr = arm_hcr_el2_eff(env);

> +        if ((hcr & (HCR_E2H | HCR_TGE)) == (HCR_E2H | HCR_TGE)) {

> +            return 0;

> +        }

> +        break;

> +    }

> +

> +    return env->cp15.cntvoff_el2;

> +}

> +

>  static uint64_t gt_virt_cnt_read(CPUARMState *env, const ARMCPRegInfo *ri)

>  {

> -    return gt_get_countervalue(env) - env->cp15.cntvoff_el2;

> +    return gt_get_countervalue(env) - gt_virt_cnt_offset(env);

>  }

>

>  static void gt_cval_write(CPUARMState *env, const ARMCPRegInfo *ri,

> @@ -2501,7 +2523,13 @@ static void gt_cval_write(CPUARMState *env, const ARMCPRegInfo *ri,

>  static uint64_t gt_tval_read(CPUARMState *env, const ARMCPRegInfo *ri,

>                               int timeridx)

>  {

> -    uint64_t offset = timeridx == GTIMER_VIRT ? env->cp15.cntvoff_el2 : 0;

> +    uint64_t offset = 0;

> +

> +    switch (timeridx) {

> +    case GTIMER_VIRT:

> +        offset = gt_virt_cnt_offset(env);

> +        break;

> +    }

>

>      return (uint32_t)(env->cp15.c14_timer[timeridx].cval -

>                        (gt_get_countervalue(env) - offset));

> @@ -2511,7 +2539,13 @@ static void gt_tval_write(CPUARMState *env, const ARMCPRegInfo *ri,

>                            int timeridx,

>                            uint64_t value)

>  {

> -    uint64_t offset = timeridx == GTIMER_VIRT ? env->cp15.cntvoff_el2 : 0;

> +    uint64_t offset = 0;

> +

> +    switch (timeridx) {

> +    case GTIMER_VIRT:

> +        offset = gt_virt_cnt_offset(env);

> +        break;

> +    }

>

>      trace_arm_gt_tval_write(timeridx, value);

>      env->cp15.c14_timer[timeridx].cval = gt_get_countervalue(env) - offset +



--
Alex Bennée
diff mbox series

Patch

diff --git a/target/arm/helper.c b/target/arm/helper.c
index da2e0627b2..3124d682a2 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -2484,9 +2484,31 @@  static uint64_t gt_cnt_read(CPUARMState *env, const ARMCPRegInfo *ri)
     return gt_get_countervalue(env);
 }
 
+static uint64_t gt_virt_cnt_offset(CPUARMState *env)
+{
+    uint64_t hcr;
+
+    switch (arm_current_el(env)) {
+    case 2:
+        hcr = arm_hcr_el2_eff(env);
+        if (hcr & HCR_E2H) {
+            return 0;
+        }
+        break;
+    case 0:
+        hcr = arm_hcr_el2_eff(env);
+        if ((hcr & (HCR_E2H | HCR_TGE)) == (HCR_E2H | HCR_TGE)) {
+            return 0;
+        }
+        break;
+    }
+
+    return env->cp15.cntvoff_el2;
+}
+
 static uint64_t gt_virt_cnt_read(CPUARMState *env, const ARMCPRegInfo *ri)
 {
-    return gt_get_countervalue(env) - env->cp15.cntvoff_el2;
+    return gt_get_countervalue(env) - gt_virt_cnt_offset(env);
 }
 
 static void gt_cval_write(CPUARMState *env, const ARMCPRegInfo *ri,
@@ -2501,7 +2523,13 @@  static void gt_cval_write(CPUARMState *env, const ARMCPRegInfo *ri,
 static uint64_t gt_tval_read(CPUARMState *env, const ARMCPRegInfo *ri,
                              int timeridx)
 {
-    uint64_t offset = timeridx == GTIMER_VIRT ? env->cp15.cntvoff_el2 : 0;
+    uint64_t offset = 0;
+
+    switch (timeridx) {
+    case GTIMER_VIRT:
+        offset = gt_virt_cnt_offset(env);
+        break;
+    }
 
     return (uint32_t)(env->cp15.c14_timer[timeridx].cval -
                       (gt_get_countervalue(env) - offset));
@@ -2511,7 +2539,13 @@  static void gt_tval_write(CPUARMState *env, const ARMCPRegInfo *ri,
                           int timeridx,
                           uint64_t value)
 {
-    uint64_t offset = timeridx == GTIMER_VIRT ? env->cp15.cntvoff_el2 : 0;
+    uint64_t offset = 0;
+
+    switch (timeridx) {
+    case GTIMER_VIRT:
+        offset = gt_virt_cnt_offset(env);
+        break;
+    }
 
     trace_arm_gt_tval_write(timeridx, value);
     env->cp15.c14_timer[timeridx].cval = gt_get_countervalue(env) - offset +