From patchwork Wed Jun 5 20:57:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 165933 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp7866560ili; Wed, 5 Jun 2019 14:11:22 -0700 (PDT) X-Google-Smtp-Source: APXvYqwhiFsKrMhZ23kHyPziKkOqYyYxX4NSFkYaxBFFKm+Lg6ZrjZDtw7qGuW6AyULwZN0eb+Lk X-Received: by 2002:a0c:9357:: with SMTP id e23mr4039596qve.173.1559769082316; Wed, 05 Jun 2019 14:11:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559769082; cv=none; d=google.com; s=arc-20160816; b=Koh3aNO2T3tou/su+rH5zcv4z/86FpYalxwV4G2NFQwc/DupF5H35joZTSGsp8r1zv +8uCdwV192vormsPE4xFz/hFBkUd3QIx/dyNu9ZKmSOPqJf+gCPZS2Pi727PDVzO6x5r m156yFF+jw8OfAXZATjzr3Vm2L9B/otjKNgJp0+4m3mX5NFyUtblpJZH8bxpC2KkWF9t 8+BHsVt5tJ4I7zHUSwzCmp0zmBXH+FoXgEbcQdieTloRX2QrsG8aeaVSnGw9nU0zGaef 41jNG3srWf6S7iFqlnK9x4H8lJs/LfEH/UZXh9rs7ko5XoKNwUxKtwoqyjw9FOSrnt7o zScg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=c6s3cz8Azngdshx9nMls9ehZ7rxdcfsNQPzwRD0wABs=; b=K/Xm2PtMKqtfdy6Vjzfy+WTE/5we1U93p6bwMSZCkpy7oLmAJNOo9BFbi1Ic4J73uP TaieEXb8Zxwz5LXBwqekw9qKderudSyE9FRRZxgZiPXsHW90EzldMqaRVoW1Do3yQ6eE FHXQFxQIQ6hCy0zXw/n4ss4J5LPhdf9volvjdwvtPz7nI/eJoy4ZonIMdrz3VzAFLNNM vngm9TCbrH2f+3R6ihl0q+h7q90vYjjO+moC+PZliWXtFIz82hZdcovp4RjUpPPf4+ko AQhkBLRhOkd0lVE/VIWCbC2gV8jbSnGYid2BEqX24jzfawWEIXicWV1QjFRc8M+SYn+C khNQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Pi3aTdqr; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id j18si4767964qvc.174.2019.06.05.14.11.22 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 05 Jun 2019 14:11:22 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Pi3aTdqr; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1]:50141 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hYdBp-0000K9-QF for patch@linaro.org; Wed, 05 Jun 2019 17:11:21 -0400 Received: from eggs.gnu.org ([209.51.188.92]:48249) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hYcyW-0006Ym-Rx for qemu-devel@nongnu.org; Wed, 05 Jun 2019 16:57:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hYcyT-0000k8-9Z for qemu-devel@nongnu.org; Wed, 05 Jun 2019 16:57:35 -0400 Received: from mail-ot1-x343.google.com ([2607:f8b0:4864:20::343]:36873) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hYcyP-0000CX-6P for qemu-devel@nongnu.org; Wed, 05 Jun 2019 16:57:31 -0400 Received: by mail-ot1-x343.google.com with SMTP id r10so2079085otd.4 for ; Wed, 05 Jun 2019 13:57:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=c6s3cz8Azngdshx9nMls9ehZ7rxdcfsNQPzwRD0wABs=; b=Pi3aTdqrqeBRGYuhTiHfiPC9dJQoKV2XJ37yN/xweKBwjVEvLlHt442LxzAWbr5mDD hHDFdAC+YGK+/sJAOM7ZuQMgz2EyltsxHz2v1//GtT/DI650Hp8gfUKN6NEUHmiGJ8/W W3V7UQRZHps8uhZ/6SrC9f3Hw32ugHwDhAOF/hvEWZMi7oczhrN7tzTCEdLKSKRSPv4t 68am+nU/xhCyOKxRvXzRibHYcDbkVM+6A6GJLdRVU4lKt5iKbLP4AwYbs5UAHLQql/ye i2GHYJbqTrzCfK6cT/8Y4Dh/5re747t4ZJP+lspe6bOachDWMFA7Bs2GvyQfGOGF1EOr ak3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=c6s3cz8Azngdshx9nMls9ehZ7rxdcfsNQPzwRD0wABs=; b=qgr0tgxoJBkztPsjFd70vCT4WYNeFVd0UG2V5cYgQ68HioGCPMpHhFgyI5afbakRXD Jk+QMMgebj2uUxWczdni0xwAF5LuBj83IJA4zurAGiY71N4thw5Ls4fTSAY3aVmkwQgy hZvK64IBoAVzc2qoF4D5u9nqUUimbcf/0T2FAsGZxccyISmFNCeXN1KIUwcu0W5hEg8R voaaGhW22mYMy0KSJGKwd5yTKa80CZNVuF8bS3sFaao4OCCz/k2wx9UgJ3DJliDF3mDc VGj4GHIc85cmsNN1LcGaqT5GQkKGLaABCrp8sXmgMEaNOfCu2VrWqHoWdruKtPpsnOxY R4fw== X-Gm-Message-State: APjAAAUn58NsubxSy9N8ssUSOdQRis8SUo2s7WtPq9VwLBtg+eWuE6nM tyoaS4zf6CqPKX+ZivQTfp35G616BmjTSA== X-Received: by 2002:a9d:10c:: with SMTP id 12mr11837547otu.123.1559768241530; Wed, 05 Jun 2019 13:57:21 -0700 (PDT) Received: from localhost.localdomain (200-56-192-86-cable.cybercable.net.mx. [200.56.192.86]) by smtp.gmail.com with ESMTPSA id f5sm7414155otl.51.2019.06.05.13.57.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 05 Jun 2019 13:57:20 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 5 Jun 2019 15:57:06 -0500 Message-Id: <20190605205706.569-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190605205706.569-1-richard.henderson@linaro.org> References: <20190605205706.569-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::343 Subject: [Qemu-devel] [PATCH v6 6/6] tests/tcg/aarch64: Add bti smoke test X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, Dave.Martin@arm.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This will build with older toolchains, without the upstream support for -mbranch-protection. Such a toolchain will produce a warning in such cases, ld: warning: /tmp/ccyZt0kq.o: unsupported GNU_PROPERTY_TYPE (5) \ type: 0xc0000000 but the still places the note at the correct location in the binary for processing by the runtime loader. Signed-off-by: Richard Henderson --- tests/tcg/aarch64/bti-1.c | 77 +++++++++++++++++++++++++++++++ tests/tcg/aarch64/bti-crt.inc.c | 69 +++++++++++++++++++++++++++ tests/tcg/aarch64/Makefile.target | 3 ++ 3 files changed, 149 insertions(+) create mode 100644 tests/tcg/aarch64/bti-1.c create mode 100644 tests/tcg/aarch64/bti-crt.inc.c -- 2.17.1 diff --git a/tests/tcg/aarch64/bti-1.c b/tests/tcg/aarch64/bti-1.c new file mode 100644 index 0000000000..2aee57ea7a --- /dev/null +++ b/tests/tcg/aarch64/bti-1.c @@ -0,0 +1,77 @@ +/* + * Branch target identification, basic notskip cases. + */ + +#include "bti-crt.inc.c" + +/* + * Work around lack of -mbranch-protection=standard in older toolchains. + * The signal handler is invoked by the kernel with PSTATE.BTYPE=2, which + * means that the handler must begin with a marker like BTI_C. + */ +asm("skip2_sigill1:\n\ + hint #34\n\ + b skip2_sigill2\n\ +.type skip2_sigill1,%function\n\ +.size skip2_sigill1,8"); + +extern void skip2_sigill1(int sig, siginfo_t *info, ucontext_t *uc) + __attribute__((visibility("hidden"))); + +static void __attribute__((used)) +skip2_sigill2(int sig, siginfo_t *info, ucontext_t *uc) +{ + uc->uc_mcontext.pc += 8; + uc->uc_mcontext.pstate = 1; +} + +#define NOP "nop" +#define BTI_N "hint #32" +#define BTI_C "hint #34" +#define BTI_J "hint #36" +#define BTI_JC "hint #38" + +#define BTYPE_1(DEST) \ + asm("mov %0,#1; adr x16, 1f; br x16; 1: " DEST "; mov %0,#0" \ + : "=r"(skipped) : : "x16") + +#define BTYPE_2(DEST) \ + asm("mov %0,#1; adr x16, 1f; blr x16; 1: " DEST "; mov %0,#0" \ + : "=r"(skipped) : : "x16", "x30") + +#define BTYPE_3(DEST) \ + asm("mov %0,#1; adr x15, 1f; br x15; 1: " DEST "; mov %0,#0" \ + : "=r"(skipped) : : "x15") + +#define TEST(WHICH, DEST, EXPECT) \ + do { WHICH(DEST); fail += skipped ^ EXPECT; } while (0) + + +int main() +{ + int fail = 0; + int skipped; + + /* Signal-like with SA_SIGINFO. */ + signal_info(SIGILL, skip2_sigill1); + + TEST(BTYPE_1, NOP, 1); + TEST(BTYPE_1, BTI_N, 1); + TEST(BTYPE_1, BTI_C, 0); + TEST(BTYPE_1, BTI_J, 0); + TEST(BTYPE_1, BTI_JC, 0); + + TEST(BTYPE_2, NOP, 1); + TEST(BTYPE_2, BTI_N, 1); + TEST(BTYPE_2, BTI_C, 0); + TEST(BTYPE_2, BTI_J, 1); + TEST(BTYPE_2, BTI_JC, 0); + + TEST(BTYPE_3, NOP, 1); + TEST(BTYPE_3, BTI_N, 1); + TEST(BTYPE_3, BTI_C, 1); + TEST(BTYPE_3, BTI_J, 0); + TEST(BTYPE_3, BTI_JC, 0); + + return fail; +} diff --git a/tests/tcg/aarch64/bti-crt.inc.c b/tests/tcg/aarch64/bti-crt.inc.c new file mode 100644 index 0000000000..bb363853de --- /dev/null +++ b/tests/tcg/aarch64/bti-crt.inc.c @@ -0,0 +1,69 @@ +/* + * Minimal user-environment for testing BTI. + * + * Normal libc is not built with BTI support enabled, and so could + * generate a BTI TRAP before ever reaching main. + */ + +#include +#include +#include +#include + +int main(void); + +void _start(void) +{ + exit(main()); +} + +void exit(int ret) +{ + register int x0 __asm__("x0") = ret; + register int x8 __asm__("x8") = __NR_exit; + + asm volatile("svc #0" : : "r"(x0), "r"(x8)); + __builtin_unreachable(); +} + +/* + * Irritatingly, the user API struct sigaction does not match the + * kernel API struct sigaction. So for simplicity, isolate the + * kernel ABI here, and make this act like signal. + */ +void signal_info(int sig, void (*fn)(int, siginfo_t *, ucontext_t *)) +{ + struct kernel_sigaction { + void (*handler)(int, siginfo_t *, ucontext_t *); + unsigned long flags; + unsigned long restorer; + unsigned long mask; + } sa = { fn, SA_SIGINFO, 0, 0 }; + + register int x0 __asm__("x0") = sig; + register void *x1 __asm__("x1") = &sa; + register void *x2 __asm__("x2") = 0; + register int x3 __asm__("x3") = sizeof(unsigned long); + register int x8 __asm__("x8") = __NR_rt_sigaction; + + asm volatile("svc #0" + : : "r"(x0), "r"(x1), "r"(x2), "r"(x3), "r"(x8) : "memory"); +} + +/* + * Create the PT_NOTE that will enable BTI in the page tables. + * This will be created by the compiler with -mbranch-protection=standard, + * but as of 2019-03-29, this is has not been committed to gcc mainline. + * This will probably be in GCC10. + */ +asm(".section .note.gnu.property,\"a\"\n\ + .align 3\n\ + .long 4\n\ + .long 16\n\ + .long 5\n\ + .string \"GNU\"\n\ + .long 0xc0000000\n\ + .long 4\n\ + .long 1\n\ + .align 3\n\ + .previous"); diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target index 2bb914975b..21da3bc37f 100644 --- a/tests/tcg/aarch64/Makefile.target +++ b/tests/tcg/aarch64/Makefile.target @@ -18,4 +18,7 @@ run-fcvt: fcvt AARCH64_TESTS += pauth-1 run-pauth-%: QEMU += -cpu max +AARCH64_TESTS += bti-1 +bti-1: LDFLAGS += -nostartfiles -nodefaultlibs -nostdlib + TESTS:=$(AARCH64_TESTS)