[PULL,31/31] tcg/aarch64: Do not advertise minmax for MO_64

Message ID	20190514000540.4313-32-richard.henderson@linaro.org
State	New
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Date: Mon, 13 May 2019 17:05:40 -0700 Message-Id: <20190514000540.4313-32-richard.henderson@linaro.org> In-Reply-To: <20190514000540.4313-1-richard.henderson@linaro.org> References: <20190514000540.4313-1-richard.henderson@linaro.org> Subject: [Qemu-devel] [PULL 31/31] tcg/aarch64: Do not advertise minmax for MO_64 Precedence: list Cc: peter.maydell@linux.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>
Series	tcg: gvec improvments \| expand [PULL,00/31] tcg: gvec improvments [PULL,01/31] tcg: Implement tcg_gen_gvec_3i() [PULL,02/31] tcg: Do not recreate INDEX_op_neg_vec unless supported [PULL,03/31] tcg: Allow add_vec, sub_vec, neg_vec, not_vec to be expanded [PULL,04/31] tcg: Specify optional vector requirements with a list [PULL,05/31] tcg: Assert fixed_reg is read-only [PULL,06/31] tcg/arm: Use tcg_out_mov_reg in tcg_out_mov [PULL,07/31] tcg: Return bool success from tcg_out_mov [PULL,08/31] tcg: Support cross-class moves without instruction support [PULL,09/31] tcg: Promote tcg_out_{dup, dupi}_vec to backend interface [PULL,10/31] tcg: Manually expand INDEX_op_dup_vec [PULL,11/31] tcg: Add tcg_out_dupm_vec to the backend interface [PULL,12/31] tcg/i386: Implement tcg_out_dupm_vec [PULL,13/31] tcg/aarch64: Implement tcg_out_dupm_vec [PULL,14/31] tcg: Add INDEX_op_dupm_vec [PULL,15/31] tcg: Add gvec expanders for variable shift [PULL,16/31] tcg/i386: Support vector variable shift opcodes [PULL,17/31] tcg/aarch64: Support vector variable shift opcodes [PULL,18/31] tcg: Add gvec expanders for vector shift by scalar [PULL,19/31] tcg/i386: Support vector scalar shift opcodes [PULL,20/31] tcg: Add support for integer absolute value [PULL,21/31] tcg: Add support for vector absolute value [PULL,22/31] tcg/i386: Support vector absolute value [PULL,23/31] tcg/aarch64: Support vector absolute value [PULL,24/31] target/arm: Use tcg_gen_abs_i64 and tcg_gen_gvec_abs [PULL,25/31] target/cris: Use tcg_gen_abs_tl [PULL,26/31] target/ppc: Use tcg_gen_abs_i32 [PULL,27/31] target/ppc: Use tcg_gen_abs_tl [PULL,28/31] target/s390x: Use tcg_gen_abs_i64 [PULL,29/31] target/tricore: Use tcg_gen_abs_tl [PULL,30/31] target/xtensa: Use tcg_gen_abs_i32 [PULL,31/31] tcg/aarch64: Do not advertise minmax for MO_64

Message ID

20190514000540.4313-32-richard.henderson@linaro.org

State

New

Headers

Received-SPF: pass (google.com: domain of
	qemu-devel-bounces+patch=linaro.org@nongnu.org designates
	209.51.188.17 as permitted sender) client-ip=209.51.188.17; 
From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Date: Mon, 13 May 2019 17:05:40 -0700
Message-Id: <20190514000540.4313-32-richard.henderson@linaro.org>
In-Reply-To: <20190514000540.4313-1-richard.henderson@linaro.org>
References: <20190514000540.4313-1-richard.henderson@linaro.org>
Subject: [Qemu-devel] [PULL 31/31] tcg/aarch64: Do not advertise minmax for
	MO_64
Precedence: list
Cc: peter.maydell@linux.org
Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org
Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>

Series

tcg: gvec improvments | expand

Commit Message

Richard Henderson May 14, 2019, 12:05 a.m. UTC

The min/max instructions are not available for 64-bit elements.

Fixes: 93f332a50371
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 tcg/aarch64/tcg-target.inc.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

-- 
2.17.1

diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index 1248dfd04c..40bf35079a 100644
--- a/tcg/aarch64/tcg-target.inc.c
+++ b/tcg/aarch64/tcg-target.inc.c
@@ -2333,16 +2333,16 @@  int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece)
     case INDEX_op_sssub_vec:
     case INDEX_op_usadd_vec:
     case INDEX_op_ussub_vec:
-    case INDEX_op_smax_vec:
-    case INDEX_op_smin_vec:
-    case INDEX_op_umax_vec:
-    case INDEX_op_umin_vec:
     case INDEX_op_shlv_vec:
         return 1;
     case INDEX_op_shrv_vec:
     case INDEX_op_sarv_vec:
         return -1;
     case INDEX_op_mul_vec:
+    case INDEX_op_smax_vec:
+    case INDEX_op_smin_vec:
+    case INDEX_op_umax_vec:
+    case INDEX_op_umin_vec:
         return vece < MO_64;
 
     default:

[PULL,31/31] tcg/aarch64: Do not advertise minmax for MO_64

Commit Message

Patch