Message ID | 20190514000540.4313-26-richard.henderson@linaro.org |
---|---|
State | Accepted |
Commit | 73f671f1a2cbf98264c376359449e4e2a21b8853 |
Headers | show
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[97.113.13.231]) by smtp.gmail.com with ESMTPSA id u3sm238151pfn.29.2019.05.13.17.06.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 13 May 2019 17:06:14 -0700 (PDT) From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Date: Mon, 13 May 2019 17:05:34 -0700 Message-Id: <20190514000540.4313-26-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190514000540.4313-1-richard.henderson@linaro.org> References: <20190514000540.4313-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::543 Subject: [Qemu-devel] [PULL 25/31] target/cris: Use tcg_gen_abs_tl X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel/> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Cc: peter.maydell@linux.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org> |
Series |
tcg: gvec improvments
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expand
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diff --git a/target/cris/translate.c b/target/cris/translate.c index b005a5c20e..31b40a57f9 100644 --- a/target/cris/translate.c +++ b/target/cris/translate.c @@ -1686,18 +1686,11 @@ static int dec_cmp_r(CPUCRISState *env, DisasContext *dc) static int dec_abs_r(CPUCRISState *env, DisasContext *dc) { - TCGv t0; - LOG_DIS("abs $r%u, $r%u\n", dc->op1, dc->op2); cris_cc_mask(dc, CC_MASK_NZ); - t0 = tcg_temp_new(); - tcg_gen_sari_tl(t0, cpu_R[dc->op1], 31); - tcg_gen_xor_tl(cpu_R[dc->op2], cpu_R[dc->op1], t0); - tcg_gen_sub_tl(cpu_R[dc->op2], cpu_R[dc->op2], t0); - tcg_temp_free(t0); - + tcg_gen_abs_tl(cpu_R[dc->op2], cpu_R[dc->op1]); cris_alu(dc, CC_OP_MOVE, cpu_R[dc->op2], cpu_R[dc->op2], cpu_R[dc->op2], 4); return 2;