diff mbox series

[v2,11/27] target/mips: Tidy control flow in mips_cpu_handle_mmu_fault

Message ID 20190509060246.4031-12-richard.henderson@linaro.org
State Superseded
Headers show
Series tcg: Add CPUClass::tlb_fill | expand

Commit Message

Richard Henderson May 9, 2019, 6:02 a.m. UTC 
Since the only non-negative TLBRET_* value is TLBRET_MATCH,
the subsequent test for ret < 0 is useless.  Use early return
to allow subsequent blocks to be unindented.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/mips/helper.c | 54 ++++++++++++++++++++------------------------
 1 file changed, 24 insertions(+), 30 deletions(-)

-- 
2.17.1

Comments

Philippe Mathieu-Daudé May 9, 2019, 10:01 a.m. UTC | #1 
On 5/9/19 8:02 AM, Richard Henderson wrote:
> Since the only non-negative TLBRET_* value is TLBRET_MATCH,

> the subsequent test for ret < 0 is useless.  Use early return

> to allow subsequent blocks to be unindented.

> 

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  target/mips/helper.c | 54 ++++++++++++++++++++------------------------

>  1 file changed, 24 insertions(+), 30 deletions(-)

> 

> diff --git a/target/mips/helper.c b/target/mips/helper.c

> index cc7be7703a..86e622efb8 100644

> --- a/target/mips/helper.c

> +++ b/target/mips/helper.c

> @@ -915,41 +915,35 @@ int mips_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw,

>          tlb_set_page(cs, address & TARGET_PAGE_MASK,

>                       physical & TARGET_PAGE_MASK, prot | PAGE_EXEC,

>                       mmu_idx, TARGET_PAGE_SIZE);

> -        ret = 0;

> -    } else if (ret < 0)

> -#endif

> -    {

> -#if !defined(CONFIG_USER_ONLY)

> +        return 0;

> +    }

>  #if !defined(TARGET_MIPS64)

> -        if ((ret == TLBRET_NOMATCH) && (env->tlb->nb_tlb > 1)) {

> -            /*

> -             * Memory reads during hardware page table walking are performed

> -             * as if they were kernel-mode load instructions.

> -             */

> -            int mode = (env->hflags & MIPS_HFLAG_KSU);

> -            bool ret_walker;

> -            env->hflags &= ~MIPS_HFLAG_KSU;

> -            ret_walker = page_table_walk_refill(env, address, rw, mmu_idx);

> -            env->hflags |= mode;

> -            if (ret_walker) {

> -                ret = get_physical_address(env, &physical, &prot,

> -                                           address, rw, access_type, mmu_idx);

> -                if (ret == TLBRET_MATCH) {

> -                    tlb_set_page(cs, address & TARGET_PAGE_MASK,

> -                            physical & TARGET_PAGE_MASK, prot | PAGE_EXEC,

> -                            mmu_idx, TARGET_PAGE_SIZE);

> -                    ret = 0;

> -                    return ret;

> -                }

> +    if ((ret == TLBRET_NOMATCH) && (env->tlb->nb_tlb > 1)) {

> +        /*

> +         * Memory reads during hardware page table walking are performed

> +         * as if they were kernel-mode load instructions.

> +         */

> +        int mode = (env->hflags & MIPS_HFLAG_KSU);

> +        bool ret_walker;

> +        env->hflags &= ~MIPS_HFLAG_KSU;

> +        ret_walker = page_table_walk_refill(env, address, rw, mmu_idx);

> +        env->hflags |= mode;

> +        if (ret_walker) {

> +            ret = get_physical_address(env, &physical, &prot,

> +                                       address, rw, access_type, mmu_idx);

> +            if (ret == TLBRET_MATCH) {

> +                tlb_set_page(cs, address & TARGET_PAGE_MASK,

> +                             physical & TARGET_PAGE_MASK, prot | PAGE_EXEC,

> +                             mmu_idx, TARGET_PAGE_SIZE);

> +                return 0;

>              }

>          }

> -#endif

> -#endif

> -        raise_mmu_exception(env, address, rw, ret);

> -        ret = 1;

>      }

> +#endif

> +#endif

>  

> -    return ret;

> +    raise_mmu_exception(env, address, rw, ret);

> +    return 1;

>  }

>  

>  #if !defined(CONFIG_USER_ONLY)

> 


Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
diff mbox series

Patch

diff --git a/target/mips/helper.c b/target/mips/helper.c
index cc7be7703a..86e622efb8 100644
--- a/target/mips/helper.c
+++ b/target/mips/helper.c
@@ -915,41 +915,35 @@  int mips_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw,
         tlb_set_page(cs, address & TARGET_PAGE_MASK,
                      physical & TARGET_PAGE_MASK, prot | PAGE_EXEC,
                      mmu_idx, TARGET_PAGE_SIZE);
-        ret = 0;
-    } else if (ret < 0)
-#endif
-    {
-#if !defined(CONFIG_USER_ONLY)
+        return 0;
+    }
 #if !defined(TARGET_MIPS64)
-        if ((ret == TLBRET_NOMATCH) && (env->tlb->nb_tlb > 1)) {
-            /*
-             * Memory reads during hardware page table walking are performed
-             * as if they were kernel-mode load instructions.
-             */
-            int mode = (env->hflags & MIPS_HFLAG_KSU);
-            bool ret_walker;
-            env->hflags &= ~MIPS_HFLAG_KSU;
-            ret_walker = page_table_walk_refill(env, address, rw, mmu_idx);
-            env->hflags |= mode;
-            if (ret_walker) {
-                ret = get_physical_address(env, &physical, &prot,
-                                           address, rw, access_type, mmu_idx);
-                if (ret == TLBRET_MATCH) {
-                    tlb_set_page(cs, address & TARGET_PAGE_MASK,
-                            physical & TARGET_PAGE_MASK, prot | PAGE_EXEC,
-                            mmu_idx, TARGET_PAGE_SIZE);
-                    ret = 0;
-                    return ret;
-                }
+    if ((ret == TLBRET_NOMATCH) && (env->tlb->nb_tlb > 1)) {
+        /*
+         * Memory reads during hardware page table walking are performed
+         * as if they were kernel-mode load instructions.
+         */
+        int mode = (env->hflags & MIPS_HFLAG_KSU);
+        bool ret_walker;
+        env->hflags &= ~MIPS_HFLAG_KSU;
+        ret_walker = page_table_walk_refill(env, address, rw, mmu_idx);
+        env->hflags |= mode;
+        if (ret_walker) {
+            ret = get_physical_address(env, &physical, &prot,
+                                       address, rw, access_type, mmu_idx);
+            if (ret == TLBRET_MATCH) {
+                tlb_set_page(cs, address & TARGET_PAGE_MASK,
+                             physical & TARGET_PAGE_MASK, prot | PAGE_EXEC,
+                             mmu_idx, TARGET_PAGE_SIZE);
+                return 0;
             }
         }
-#endif
-#endif
-        raise_mmu_exception(env, address, rw, ret);
-        ret = 1;
     }
+#endif
+#endif
 
-    return ret;
+    raise_mmu_exception(env, address, rw, ret);
+    return 1;
 }
 
 #if !defined(CONFIG_USER_ONLY)