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[97.113.189.189]) by smtp.gmail.com with ESMTPSA id j1sm15793183pgp.91.2019.05.07.17.07.01 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 07 May 2019 17:07:02 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 7 May 2019 17:06:17 -0700 Message-Id: <20190508000641.19090-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190508000641.19090-1-richard.henderson@linaro.org> References: <20190508000641.19090-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::442 Subject: [Qemu-devel] [PATCH v3 15/39] target/lm32: Use env_cpu, env_archcpu X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/lm32/cpu.h | 5 ----- target/lm32/helper.c | 19 ++++++------------- target/lm32/op_helper.c | 6 +++--- target/lm32/translate.c | 2 +- 4 files changed, 10 insertions(+), 22 deletions(-) -- 2.17.1 Reviewed-by: Alistair Francis diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h index c6b252f90a..8e7b70a275 100644 --- a/target/lm32/cpu.h +++ b/target/lm32/cpu.h @@ -195,11 +195,6 @@ struct LM32CPU { uint32_t features; }; -static inline LM32CPU *lm32_env_get_cpu(CPULM32State *env) -{ - return container_of(env, LM32CPU, env); -} - #define ENV_OFFSET offsetof(LM32CPU, env) #ifndef CONFIG_USER_ONLY diff --git a/target/lm32/helper.c b/target/lm32/helper.c index a039a993ff..674cbd7fe4 100644 --- a/target/lm32/helper.c +++ b/target/lm32/helper.c @@ -58,28 +58,23 @@ hwaddr lm32_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) void lm32_breakpoint_insert(CPULM32State *env, int idx, target_ulong address) { - LM32CPU *cpu = lm32_env_get_cpu(env); - - cpu_breakpoint_insert(CPU(cpu), address, BP_CPU, + cpu_breakpoint_insert(env_cpu(env), address, BP_CPU, &env->cpu_breakpoint[idx]); } void lm32_breakpoint_remove(CPULM32State *env, int idx) { - LM32CPU *cpu = lm32_env_get_cpu(env); - if (!env->cpu_breakpoint[idx]) { return; } - cpu_breakpoint_remove_by_ref(CPU(cpu), env->cpu_breakpoint[idx]); + cpu_breakpoint_remove_by_ref(env_cpu(env), env->cpu_breakpoint[idx]); env->cpu_breakpoint[idx] = NULL; } void lm32_watchpoint_insert(CPULM32State *env, int idx, target_ulong address, lm32_wp_t wp_type) { - LM32CPU *cpu = lm32_env_get_cpu(env); int flags = 0; switch (wp_type) { @@ -98,26 +93,24 @@ void lm32_watchpoint_insert(CPULM32State *env, int idx, target_ulong address, } if (flags != 0) { - cpu_watchpoint_insert(CPU(cpu), address, 1, flags, - &env->cpu_watchpoint[idx]); + cpu_watchpoint_insert(env_cpu(env), address, 1, flags, + &env->cpu_watchpoint[idx]); } } void lm32_watchpoint_remove(CPULM32State *env, int idx) { - LM32CPU *cpu = lm32_env_get_cpu(env); - if (!env->cpu_watchpoint[idx]) { return; } - cpu_watchpoint_remove_by_ref(CPU(cpu), env->cpu_watchpoint[idx]); + cpu_watchpoint_remove_by_ref(env_cpu(env), env->cpu_watchpoint[idx]); env->cpu_watchpoint[idx] = NULL; } static bool check_watchpoints(CPULM32State *env) { - LM32CPU *cpu = lm32_env_get_cpu(env); + LM32CPU *cpu = env_archcpu(env); int i; for (i = 0; i < cpu->num_watchpoints; i++) { diff --git a/target/lm32/op_helper.c b/target/lm32/op_helper.c index 234d55e056..ebff4c4518 100644 --- a/target/lm32/op_helper.c +++ b/target/lm32/op_helper.c @@ -16,7 +16,7 @@ #if !defined(CONFIG_USER_ONLY) void raise_exception(CPULM32State *env, int index) { - CPUState *cs = CPU(lm32_env_get_cpu(env)); + CPUState *cs = env_cpu(env); cs->exception_index = index; cpu_loop_exit(cs); @@ -29,7 +29,7 @@ void HELPER(raise_exception)(CPULM32State *env, uint32_t index) void HELPER(hlt)(CPULM32State *env) { - CPUState *cs = CPU(lm32_env_get_cpu(env)); + CPUState *cs = env_cpu(env); cs->halted = 1; cs->exception_index = EXCP_HLT; @@ -39,7 +39,7 @@ void HELPER(hlt)(CPULM32State *env) void HELPER(ill)(CPULM32State *env) { #ifndef CONFIG_USER_ONLY - CPUState *cs = CPU(lm32_env_get_cpu(env)); + CPUState *cs = env_cpu(env); fprintf(stderr, "VM paused due to illegal instruction. " "Connect a debugger or switch to the monitor console " "to find out more.\n"); diff --git a/target/lm32/translate.c b/target/lm32/translate.c index f0e0e7058e..b9f2f2c4a7 100644 --- a/target/lm32/translate.c +++ b/target/lm32/translate.c @@ -1053,7 +1053,7 @@ static inline void decode(DisasContext *dc, uint32_t ir) void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) { CPULM32State *env = cs->env_ptr; - LM32CPU *cpu = lm32_env_get_cpu(env); + LM32CPU *cpu = env_archcpu(env); struct DisasContext ctx, *dc = &ctx; uint32_t pc_start; uint32_t page_start;