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X-Received-From: 2607:f8b0:4864:20::543 Subject: [Qemu-devel] [PATCH for-4.1 1/6] target/s390x: Truncate 32-bit psw_addr before creating TB X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, cohuck@redhat.com, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" If, somehow, the psw_addr is out of range, truncate early rather than after we get into gen_intermediate_code. Signed-off-by: Richard Henderson --- target/s390x/cpu.h | 26 +++++++++++++++++++------- target/s390x/translate.c | 6 ------ 2 files changed, 19 insertions(+), 13 deletions(-) -- 2.17.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index cb6d77053a..6ccf41fc45 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -368,18 +368,30 @@ static inline int cpu_mmu_index(CPUS390XState *env, bool ifetch) } } -static inline void cpu_get_tb_cpu_state(CPUS390XState* env, target_ulong *pc, - target_ulong *cs_base, uint32_t *flags) +static inline void cpu_get_tb_cpu_state(CPUS390XState* env, + target_ulong *p_pc, + target_ulong *cs_base, + uint32_t *p_flags) { - *pc = env->psw.addr; - *cs_base = env->ex_value; - *flags = (env->psw.mask >> FLAG_MASK_PSW_SHIFT) & FLAG_MASK_PSW; + uint32_t flags; + uint64_t pc; + + flags = (env->psw.mask >> FLAG_MASK_PSW_SHIFT) & FLAG_MASK_PSW; if (env->cregs[0] & CR0_AFP) { - *flags |= FLAG_MASK_AFP; + flags |= FLAG_MASK_AFP; } if (env->cregs[0] & CR0_VECTOR) { - *flags |= FLAG_MASK_VECTOR; + flags |= FLAG_MASK_VECTOR; } + + pc = env->psw.addr; + if (!(flags & FLAG_MASK_64)) { + pc &= 0x7fffffff; + } + + *p_pc = pc; + *cs_base = env->ex_value; + *p_flags = flags; } /* PER bits from control register 9 */ diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 0afa8f7ca5..d22d0f7643 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -6442,12 +6442,6 @@ static void s390x_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) { DisasContext *dc = container_of(dcbase, DisasContext, base); - /* 31-bit mode */ - if (!(dc->base.tb->flags & FLAG_MASK_64)) { - dc->base.pc_first &= 0x7fffffff; - dc->base.pc_next = dc->base.pc_first; - } - dc->cc_op = CC_OP_DYNAMIC; dc->ex_value = dc->base.tb->cs_base; dc->do_debug = dc->base.singlestep_enabled;