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[97.113.188.82]) by smtp.gmail.com with ESMTPSA id q62sm12605644pga.32.2019.03.12.09.19.21 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 12 Mar 2019 09:19:21 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 12 Mar 2019 09:19:04 -0700 Message-Id: <20190312161904.31130-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190312161904.31130-1-richard.henderson@linaro.org> References: <20190312161904.31130-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::435 Subject: [Qemu-devel] [PULL 11/11] target/hppa: exit TB if either Data or Instruction TLB changes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Sven Schnelle Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Sven Schnelle The current code assumes that we don't need to exit the TB if a Data Cache Flush or Insert has happend. However, as we have a shared Data/Instruction TLB, a Data cache flush also flushes Instruction TLB entries, and a Data cache TLB insert might also evict a Instruction TLB entry. So exit the TB in all cases if Instruction translation is enabled. Signed-off-by: Sven Schnelle Message-Id: <20190311191602.25796-11-svens@stackframe.org> Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- target/hppa/translate.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) -- 2.17.2 diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 70a7cd4a89..35c504087f 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2482,9 +2482,8 @@ static bool trans_ixtlbx(DisasContext *ctx, arg_ixtlbx *a) gen_helper_itlbp(cpu_env, addr, reg); } - /* Exit TB for ITLB change if mmu is enabled. This *should* not be - the case, since the OS TLB fill handler runs with mmu disabled. */ - if (!a->data && (ctx->tb_flags & PSW_C)) { + /* Exit TB for TLB change if mmu is enabled. */ + if (ctx->tb_flags & PSW_C) { ctx->base.is_jmp = DISAS_IAQ_N_STALE; } return nullify_end(ctx); @@ -2511,7 +2510,7 @@ static bool trans_pxtlbx(DisasContext *ctx, arg_pxtlbx *a) } /* Exit TB for TLB change if mmu is enabled. */ - if (!a->data && (ctx->tb_flags & PSW_C)) { + if (ctx->tb_flags & PSW_C) { ctx->base.is_jmp = DISAS_IAQ_N_STALE; } return nullify_end(ctx);