From patchwork Tue Dec 18 06:38:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 154107 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3361152ljp; Mon, 17 Dec 2018 23:02:51 -0800 (PST) X-Google-Smtp-Source: AFSGD/UfBzabBuHCFZIy2UUh1eWm9zv385TrPmYFju/zq/CPXVDQs/Uhw8NsPa9zs7wr8ClrZRly X-Received: by 2002:a37:ccc2:: with SMTP id n63mr14741935qkl.82.1545116571114; Mon, 17 Dec 2018 23:02:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545116571; cv=none; d=google.com; s=arc-20160816; b=KcJeUewBvMwZBGDxl25BVy6YxHEd29MZOkXADLSc7bUTNzsybajikmFYGCXc5P1KTu 7r+jnIjslQS6X1hsgczqGBVFgA8KG57CVI7XZIes6X9gyqTnq0xgdrC7FrH1Y4hT2/NS SbBQbOj6cB3x92RP2GZoq0Ss0DgQErdA3VT1loFEBBSAvKa3QcIXdt2DU50jLO/2Jke+ Uk2KwJ6njKead77y/6i0Wdf0QIuQPK1GmJ+NwB8qHndXZmfxlkzxfYOvULWOAcZJA3ed 9/4eu+c7gxSRe99rpjoC+vFkKKIaZMMy9TMHmiUfWrWPaYsUf0h9INxNLRZyuS/FQWX0 750Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=MkmjLnCmuY4EjGai5glHUVjL1YN82v4g8w9+k1ILEeA=; b=X9vnhbWAMvvCQHPueJiPKZ+2gZ8GvQXqO5PU/H57HGTa3QGXcMVUxW+4xTZP1aR5Ao nKMYuxBKmA6fjzDYzycwxANoihT5Lks3Svi333zcVKpFzsMfa2AleqldpOVicJ+EbCRD 7FzteijCGZsfM1jel0PK1cl99U5j32RIHtGiE866NZSNs7Frqmp5ZX6aNiVMWY4f8Zkx y1TUY2W+2Rmt6YQV/eBjggu/Z7xV2Ysg1GFXLZMrzpOGiBmv3hsqlWNFTCgzqb2hgoaW +TtY6fAVqX+2uvj9zfQS7UyCefYOz0+gInYReO57wJlSTB8ofUbg4JlvJTutaToEpHDg ur7A== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=VB5zsPZF; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id v20si3278769qvc.134.2018.12.17.23.02.50 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 17 Dec 2018 23:02:51 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=VB5zsPZF; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52161 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gZ9P0-0004Ij-H3 for patch@linaro.org; Tue, 18 Dec 2018 02:02:50 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53334) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gZ936-0001x9-Nb for qemu-devel@nongnu.org; Tue, 18 Dec 2018 01:40:21 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gZ92v-0002y5-Gf for qemu-devel@nongnu.org; Tue, 18 Dec 2018 01:40:12 -0500 Received: from mail-pf1-x441.google.com ([2607:f8b0:4864:20::441]:36959) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gZ92v-0002OY-2i for qemu-devel@nongnu.org; Tue, 18 Dec 2018 01:40:01 -0500 Received: by mail-pf1-x441.google.com with SMTP id y126so7654008pfb.4 for ; Mon, 17 Dec 2018 22:39:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=MkmjLnCmuY4EjGai5glHUVjL1YN82v4g8w9+k1ILEeA=; b=VB5zsPZF2SXip/gBTORjMwKxXaNwR4Z8xI0Q/1PeZXnYEg5/l7ceAYrUuwl3c4L97k oT8nWGtR/XwJCmqlkjPGtYR1pd5yC5udOxdcyiv+EKDeBOy17a1mGvLTyEvKHXnlrCw5 4SxJB4r3Hp6jf34UP+WWTxBlOBYm6fQz8PeCY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=MkmjLnCmuY4EjGai5glHUVjL1YN82v4g8w9+k1ILEeA=; b=U4hDhIadY8BRLR3DEdCHx9S/Q/UHCneZSNuKEMbqKb0hMd+LSJvddaYUeJwVCowFRe owuEVz7GVInxzig4Im6SNxJfZYw2BqiM08wmkYXcBQ8yvx6qOhTt/nnzoYOCEA0AQdn9 QEaVdlMauCo5Ntjq1SW/Q0OM3UHW1/dU42SbnWw8376IvXmgrHRtMhqH6m2bHRnZ5asQ l+LFh9EBnH/HM6ThdGDHpAI4ODUr+7pn9/0GsiCBmENEVjZAvWz7UkAZVb2i0CbeJz+n xxEUk3vfNaNeDuh2ovqDQEzAm4pjRgNq8TuA91JQVcEPv8AmNFDs5O9Y8hGDWnXn82RI W7lQ== X-Gm-Message-State: AA+aEWbGpKrFIlsx3SV/U8/zFfD08ZcclqXbJecrvMzqMRWzkYEn6Z9o 8aEBi1w49WhZi53gRcYqSk8zKufeQqQ= X-Received: by 2002:a63:f515:: with SMTP id w21mr14684241pgh.220.1545115179453; Mon, 17 Dec 2018 22:39:39 -0800 (PST) Received: from cloudburst.twiddle.net (97-126-115-157.tukw.qwest.net. [97.126.115.157]) by smtp.gmail.com with ESMTPSA id c7sm27072509pfh.18.2018.12.17.22.39.38 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 17 Dec 2018 22:39:38 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 17 Dec 2018 22:38:56 -0800 Message-Id: <20181218063911.2112-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181218063911.2112-1-richard.henderson@linaro.org> References: <20181218063911.2112-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::441 Subject: [Qemu-devel] [PATCH 19/34] target/ppc: convert vspltis[bhw] to use vector operations X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, mark.cave-ayland@ilande.co.uk, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- target/ppc/helper.h | 3 --- target/ppc/int_helper.c | 15 ------------ target/ppc/translate/vmx-impl.inc.c | 36 +++++++---------------------- 3 files changed, 8 insertions(+), 46 deletions(-) -- 2.17.2 Acked-by: David Gibson diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 553ff500c8..2aa60e5d36 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -246,9 +246,6 @@ DEF_HELPER_3(vrld, void, avr, avr, avr) DEF_HELPER_3(vsl, void, avr, avr, avr) DEF_HELPER_3(vsr, void, avr, avr, avr) DEF_HELPER_4(vsldoi, void, avr, avr, avr, i32) -DEF_HELPER_2(vspltisb, void, avr, i32) -DEF_HELPER_2(vspltish, void, avr, i32) -DEF_HELPER_2(vspltisw, void, avr, i32) DEF_HELPER_3(vspltb, void, avr, avr, i32) DEF_HELPER_3(vsplth, void, avr, avr, i32) DEF_HELPER_3(vspltw, void, avr, avr, i32) diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index 4547453ef1..e44c0d90ee 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -2066,21 +2066,6 @@ VNEG(vnegw, s32) VNEG(vnegd, s64) #undef VNEG -#define VSPLTI(suffix, element, splat_type) \ - void helper_vspltis##suffix(ppc_avr_t *r, uint32_t splat) \ - { \ - splat_type x = (int8_t)(splat << 3) >> 3; \ - int i; \ - \ - for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ - r->element[i] = x; \ - } \ - } -VSPLTI(b, s8, int8_t) -VSPLTI(h, s16, int16_t) -VSPLTI(w, s32, int32_t) -#undef VSPLTI - #define VSR(suffix, element, mask) \ void helper_vsr##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ diff --git a/target/ppc/translate/vmx-impl.inc.c b/target/ppc/translate/vmx-impl.inc.c index e353d3f174..be638cdb1a 100644 --- a/target/ppc/translate/vmx-impl.inc.c +++ b/target/ppc/translate/vmx-impl.inc.c @@ -720,25 +720,21 @@ GEN_VXRFORM_DUAL(vcmpbfp, PPC_ALTIVEC, PPC_NONE, \ GEN_VXRFORM_DUAL(vcmpgtfp, PPC_ALTIVEC, PPC_NONE, \ vcmpgtud, PPC_NONE, PPC2_ALTIVEC_207) -#define GEN_VXFORM_SIMM(name, opc2, opc3) \ +#define GEN_VXFORM_DUPI(name, tcg_op, opc2, opc3) \ static void glue(gen_, name)(DisasContext *ctx) \ { \ - TCGv_ptr rd; \ - TCGv_i32 simm; \ + int simm; \ if (unlikely(!ctx->altivec_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_VPU); \ return; \ } \ - simm = tcg_const_i32(SIMM5(ctx->opcode)); \ - rd = gen_avr_ptr(rD(ctx->opcode)); \ - gen_helper_##name (rd, simm); \ - tcg_temp_free_i32(simm); \ - tcg_temp_free_ptr(rd); \ + simm = SIMM5(ctx->opcode); \ + tcg_op(avr64_offset(rD(ctx->opcode), true), 16, 16, simm); \ } -GEN_VXFORM_SIMM(vspltisb, 6, 12); -GEN_VXFORM_SIMM(vspltish, 6, 13); -GEN_VXFORM_SIMM(vspltisw, 6, 14); +GEN_VXFORM_DUPI(vspltisb, tcg_gen_gvec_dup8i, 6, 12); +GEN_VXFORM_DUPI(vspltish, tcg_gen_gvec_dup16i, 6, 13); +GEN_VXFORM_DUPI(vspltisw, tcg_gen_gvec_dup32i, 6, 14); #define GEN_VXFORM_NOA(name, opc2, opc3) \ static void glue(gen_, name)(DisasContext *ctx) \ @@ -818,22 +814,6 @@ GEN_VXFORM_NOA(vprtybw, 1, 24); GEN_VXFORM_NOA(vprtybd, 1, 24); GEN_VXFORM_NOA(vprtybq, 1, 24); -#define GEN_VXFORM_SIMM(name, opc2, opc3) \ -static void glue(gen_, name)(DisasContext *ctx) \ - { \ - TCGv_ptr rd; \ - TCGv_i32 simm; \ - if (unlikely(!ctx->altivec_enabled)) { \ - gen_exception(ctx, POWERPC_EXCP_VPU); \ - return; \ - } \ - simm = tcg_const_i32(SIMM5(ctx->opcode)); \ - rd = gen_avr_ptr(rD(ctx->opcode)); \ - gen_helper_##name (rd, simm); \ - tcg_temp_free_i32(simm); \ - tcg_temp_free_ptr(rd); \ - } - #define GEN_VXFORM_UIMM(name, opc2, opc3) \ static void glue(gen_, name)(DisasContext *ctx) \ { \ @@ -1255,7 +1235,7 @@ GEN_VXFORM_DUAL(vsldoi, PPC_ALTIVEC, PPC_NONE, #undef GEN_VXRFORM_DUAL #undef GEN_VXRFORM1 #undef GEN_VXRFORM -#undef GEN_VXFORM_SIMM +#undef GEN_VXFORM_DUPI #undef GEN_VXFORM_NOA #undef GEN_VXFORM_UIMM #undef GEN_VAFORM_PAIRED