From patchwork Mon Nov 12 21:44:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 150884 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3652128ljp; Mon, 12 Nov 2018 13:58:10 -0800 (PST) X-Google-Smtp-Source: AJdET5f7x7y+aMknVKL6uJ6m02jsKaHmkNXz8wu0I6YUIImxdWLUW8BL3ec45FzF/J/1oJL1srri X-Received: by 2002:ac8:3a22:: with SMTP id w31mr2588853qte.302.1542059890567; Mon, 12 Nov 2018 13:58:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542059890; cv=none; d=google.com; s=arc-20160816; b=GGDhXniUhHa5Doj+a1pIpofqMSpkCOGNnu8+I9TwNHJ1TvuH+aMhorId3e245vrwOr +upudB0D1diqZIJOMPqU/LL51o5z3aJ0aDl+PGqd2+7ArFWnw5Fs6Bq6ykpc8gdlAuyy 9k+kooFGGOheN5QsP28u1RvRFrKq0gvzcMdTwiS0KaeKVyde2hH/W9FjlyZjQQAlFnC6 u7UM9RCBQKMDQ4WJ02vK9kc4IldCgmw7eqy2cBy2ytjhMTXVLEvKUFDdIkUx8xX+Ud2g QgJDK8CZtYiC+imrA7DqQaCe5BBMUFjyKoh4toSk/wKp8OYOcUeoiLebt5wQwsrrD2Gt 7XRA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=sXnNUWfT8Y/s5eYRqAv2JrCFIHDiypjLbLJHrnIH448=; b=w2+wVER1sRiJtMY1/jJjNinpBbQRvFKIxBVHgYB4pMbrPPFBBhyzIRK9IJPjANpUSc LAIfc3Y94K8AojRguzm/v64cxkIQfocu8CdzG8cbl8Nxkd5QxP55vJlNZAnS6KwqHgAH e6mFMEN41rTBQ8SK45v/tNaPrhgHDHEO2EiJdk2NI9BhTSy4NCpl2oQbJZ9msPa69DEm QLHh1Flhj7Wzg1auzwbp47qU6Q31LBR5WI+g4D0+Bsg8PG1s+GsNvLQhwzqh7GVFH7tm I73/2ov6PSbLhvaEOdhWP/H6hzqH9wOo/UqqLTYZW1LfSNYhCftWMepsJFlpKTxsHrZu 47lA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=AY55slyz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id q90si141975qvq.51.2018.11.12.13.58.10 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 12 Nov 2018 13:58:10 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=AY55slyz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:50859 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gMKDh-0005b4-Sh for patch@linaro.org; Mon, 12 Nov 2018 16:58:09 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54068) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gMK35-0003UX-J1 for qemu-devel@nongnu.org; Mon, 12 Nov 2018 16:47:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gMK34-0004v1-PR for qemu-devel@nongnu.org; Mon, 12 Nov 2018 16:47:11 -0500 Received: from mail-wm1-x342.google.com ([2a00:1450:4864:20::342]:35160) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gMK34-0004ud-Il for qemu-devel@nongnu.org; Mon, 12 Nov 2018 16:47:10 -0500 Received: by mail-wm1-x342.google.com with SMTP id t15-v6so9576476wmt.0 for ; Mon, 12 Nov 2018 13:47:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=sXnNUWfT8Y/s5eYRqAv2JrCFIHDiypjLbLJHrnIH448=; b=AY55slyzpkJq0NNlpwAED5cGdCSfB8o3GBUbvCXE1t3NI70VOSPsNv9EwlGSaenq5c GoKH2eHIj1jPJeYCk0F+rU1IMLQxad0RpsoWmuRZr/1aGpK1rT6f72ZJp+9JrSVS6LsT aDRIqAvvORnTgFB6U9VwI6IgRqFOLWUoV+Eu4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=sXnNUWfT8Y/s5eYRqAv2JrCFIHDiypjLbLJHrnIH448=; b=DdXkJMxIcl73yy7fssexqAi4pT+RwKi2RQ/2Z8KNEVdDs/2bQRzJwcB2sKZqLWioVx Idbu5Cpl+qlF7G9dhpbeSIRVOwivbmjNKIqfKlVGlQUieyCiIitmuIFphX4tq851eQse YLmY4rg4ZIoz4lHpUWdM7nhyDLgbX4Pxm1VyEp+rICXqySohZBN/BDOzWSTxxrrhrybx ci+vVbIfiYEwFcIkUtDujw1GXhLLvPm0Q2uLomBeqG/yKAalmMsDYGJpqlbENd0JBKXT HK9GjNI8eEzN/eBhFetgJ99WnthAsMPJScSamsitwIbnzjXI6w0lkqk6YNKqFvob8ksZ BI2A== X-Gm-Message-State: AGRZ1gLiq0N6EJU3OswPiQiZnTOvVIEi+JsiuZaRPLbfQtjfTDgGxRsd RdoS53HDA748voIb2P9zcFGHeCW45efqXA== X-Received: by 2002:a1c:ee13:: with SMTP id m19-v6mr1063288wmh.142.1542059229387; Mon, 12 Nov 2018 13:47:09 -0800 (PST) Received: from cloudburst.twiddle.net (178.red-213-99-154.dynamicip.rima-tde.net. [213.99.154.178]) by smtp.gmail.com with ESMTPSA id y123-v6sm3946907wme.38.2018.11.12.13.47.08 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 12 Nov 2018 13:47:08 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 12 Nov 2018 22:44:49 +0100 Message-Id: <20181112214503.22941-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181112214503.22941-1-richard.henderson@linaro.org> References: <20181112214503.22941-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::342 Subject: [Qemu-devel] [PATCH for-4.0 03/17] tcg/i386: Change TCG_REG_L[01] to not overlap function arguments X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cota@braap.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We will shortly be forcing qemu_ld/st arguments into registers that match the function call abi of the host, which means that the temps must be elsewhere. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.inc.c | 28 +++++++++++++++++++--------- 1 file changed, 19 insertions(+), 9 deletions(-) -- 2.17.2 diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c index 4435a7bb52..2a96ca4274 100644 --- a/tcg/i386/tcg-target.inc.c +++ b/tcg/i386/tcg-target.inc.c @@ -121,12 +121,16 @@ static const int tcg_target_call_oarg_regs[] = { #define TCG_CT_CONST_I32 0x400 #define TCG_CT_CONST_WSZ 0x800 -/* Registers used with L constraint, which are the first argument - registers on x86_64, and two random call clobbered registers on - i386. */ +/* Registers used with L constraint, which are two random + * call clobbered registers. These should be free. + */ #if TCG_TARGET_REG_BITS == 64 -# define TCG_REG_L0 tcg_target_call_iarg_regs[0] -# define TCG_REG_L1 tcg_target_call_iarg_regs[1] +# define TCG_REG_L0 TCG_REG_RAX +# ifdef _WIN64 +# define TCG_REG_L1 TCG_REG_R10 +# else +# define TCG_REG_L1 TCG_REG_RDI +# endif #else # define TCG_REG_L0 TCG_REG_EAX # define TCG_REG_L1 TCG_REG_EDX @@ -1625,6 +1629,7 @@ static TCGReg tcg_out_tlb_load(TCGContext *s, TCGReg addrlo, TCGReg addrhi, unsigned a_mask = (1 << a_bits) - 1; unsigned s_mask = (1 << s_bits) - 1; target_ulong tlb_mask; + TCGReg base; if (TCG_TARGET_REG_BITS == 64) { if (TARGET_LONG_BITS == 64) { @@ -1671,7 +1676,12 @@ static TCGReg tcg_out_tlb_load(TCGContext *s, TCGReg addrlo, TCGReg addrhi, before the fastpath ADDQ below. For 64-bit guest and x32 host, MOVQ copies the entire guest address for the slow path, while truncation for the 32-bit host happens with the fastpath ADDL below. */ - tcg_out_mov(s, ttype, r1, addrlo); + if (TCG_TARGET_REG_BITS == 64) { + base = tcg_target_call_iarg_regs[1]; + } else { + base = r1; + } + tcg_out_mov(s, ttype, base, addrlo); /* jne slow_path */ tcg_out_opc(s, OPC_JCC_long + JCC_JNE, 0, 0, 0); @@ -1690,11 +1700,11 @@ static TCGReg tcg_out_tlb_load(TCGContext *s, TCGReg addrlo, TCGReg addrhi, /* TLB Hit. */ - /* add addend(r0), r1 */ - tcg_out_modrm_offset(s, OPC_ADD_GvEv + hrexw, r1, r0, + /* add addend(r0), base */ + tcg_out_modrm_offset(s, OPC_ADD_GvEv + hrexw, base, r0, offsetof(CPUTLBEntry, addend) - which); - return r1; + return base; } /*