From patchwork Tue Aug 7 07:57:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 143566 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp4196729ljj; Tue, 7 Aug 2018 00:59:27 -0700 (PDT) X-Google-Smtp-Source: AAOMgpfMdhGMZhjNk3rh8tHsrG50kX2N7rDQ00TqIjsdxjyCh74eIRQPjRKAZvkDr1Caq8yOBnBk X-Received: by 2002:a0c:91d0:: with SMTP id r16-v6mr16069446qvr.38.1533628767134; Tue, 07 Aug 2018 00:59:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533628767; cv=none; d=google.com; s=arc-20160816; b=NodtFz2uI2YpojOgN7exhdMWihG15+ML13EAEcytf9EKf+ajFWbvGiSDAkIDBdsaiW 7hxSxMGHAzCfRfbvf5KREXPDEtwxbn9O9idJpg1WH+49Pea8n8d7yL7SixguB1Fa5PIP QEvOJ9Mk5lGrz8eo218g2Julvt/ukNgcFmxo6bMTgCmCapEQzts+HQC4IYLZWkrc9k/Y DdNWoRdeQfwG+hT5wt364FfT3LUfJ8fhOJNTVOFWUw2m7W779yGuDuJ3A2dYwC00qohZ Aggc6CYzyvPxAmJGzUg13uu10AXaqBnxcBaCfIzztq8BOZyYfmpluH9PcdXZeRh9a1qh feDA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=SBBr+2QFo4lDT8xlNJTzO+Id2utX2pJW4S/v1I9pHbU=; b=whaZrRV2J4YlWYMR+At0bi/2DaXpg+/Lx6UahQOsN5o02qGtKH5QNBJdHQM+IMVH6a QSgC42ccWmshFIiyOQ7j4SJBIR9vopn+FC+xyTW+pr4nbMig/QN8GizeCDUgzAPRxzeE idkFE4qiJgBQTtDWPsjFGd3b04sudKn4cQRe7OUSux5Ja23/EXw+mYtQk8P9/z8vfmQF K37wu9rcf0IMWe5nG+9b+fhq+hR2phBv93M7AQczzds7ZxlwkksKVAyiKCB+1GIk8Q1N /xMOA3zi8trRuXQOF5j3zQAbBDl9Bvll/5Ecz6f1Sv8LZ6CH/bvUvxcVhWX/qO+A1EzN l23w== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=THNI6DW+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id l190-v6si621673qkf.218.2018.08.07.00.59.26 for (version=TLS1 cipher=AES128-SHA bits=128/128); Tue, 07 Aug 2018 00:59:27 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=THNI6DW+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:37806 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fmwtq-00035k-Ia for patch@linaro.org; Tue, 07 Aug 2018 03:59:26 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60768) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fmwt5-0002nE-RT for qemu-devel@nongnu.org; Tue, 07 Aug 2018 03:58:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fmwt4-0005ba-Tg for qemu-devel@nongnu.org; Tue, 07 Aug 2018 03:58:39 -0400 Received: from mail-pl0-x243.google.com ([2607:f8b0:400e:c01::243]:37619) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fmwt1-0005aC-50; Tue, 07 Aug 2018 03:58:35 -0400 Received: by mail-pl0-x243.google.com with SMTP id d5-v6so6783996pll.4; Tue, 07 Aug 2018 00:58:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=SBBr+2QFo4lDT8xlNJTzO+Id2utX2pJW4S/v1I9pHbU=; b=THNI6DW+E2zggu0rxmhQ5+KS61Aoyvujj7lkMguUKtDQTc+Y/nki92f4U4d5rp558U qqVysxUqoQv72z4k2KsVcJ2v8LWwy+CP/UEssn7GwxiSpvHqx775TZWDBWf0FWBz2EKC KqRodvSCwhCNlP0hzWXfZgaMEwVzwcdHWQAZtHXwUASJtY4Angxt5929n1uXmh+DNfxT B80FtZqDkHY/UMg71JWkNq5X65rkyE7jSmwHBZE4L2oB6WAJvU7C82EyCwOuZKPhCw2C ZTF08nICFAauQVGLXfvtFLzSSN6tBc+n5ud7mB4nGs+QwrMoK0CHERCzrfn0tDDqrbx9 Xvsw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=SBBr+2QFo4lDT8xlNJTzO+Id2utX2pJW4S/v1I9pHbU=; b=Uf1heWzT6P5rux13DWVbXer+VNx6hSCDg8urf+HFJCZJGFLqX9FvmPy6mLOFZH+J36 Q0ifq3y+kqKj3+yTYUEYxdlYPsw40dY48Sl36HXA0rHs0oXX4OW8QxooBdombrr+b8GZ 3RrXokBN9Vuo0pjqrJpX5tntaXJhrDz1jkqFQyg9DmUANaLbG46jhR22Qjx/h6gQ18HN fVGDDfHLKP9RCMckOhw12Xl1ycXFH2/FxaoP//vjvcuGrUNb3/SvQLFXvOIQ8u3F163V +Kb7mP5MkNRK0fFT9hMXXpZQkAzBSd9FNpiJDtZ6zW8ubdTtO5uXnbFPBSDqyd8WvzVQ HcqA== X-Gm-Message-State: AOUpUlHMh5FTaPdh41l/ECM8WGS2Vh5F4kiXTKmwoosQ8fa0795K+6sQ BvQEiRwsZDK7KpsHL2Npg4UkKptd X-Received: by 2002:a17:902:e005:: with SMTP id ca5-v6mr16848285plb.224.1533628714139; Tue, 07 Aug 2018 00:58:34 -0700 (PDT) Received: from aurora.jms.id.au ([45.124.203.18]) by smtp.gmail.com with ESMTPSA id d191-v6sm1458902pfg.172.2018.08.07.00.58.30 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 07 Aug 2018 00:58:33 -0700 (PDT) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Tue, 07 Aug 2018 17:28:27 +0930 From: Joel Stanley To: Peter Maydell , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= Date: Tue, 7 Aug 2018 17:27:54 +0930 Message-Id: <20180807075757.7242-5-joel@jms.id.au> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180807075757.7242-1-joel@jms.id.au> References: <20180807075757.7242-1-joel@jms.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::243 Subject: [Qemu-devel] [PATCH 4/7] aspeed_sdmc: Init status alwlays idle X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , qemu-arm@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The ast2500 SDRAM training routine busy waits on the 'init cycle busy state' bit in DDR PHY Control/Status register #1 (MCR60). This ensures the bit always reads zero, and allows training to complete with upstream u-boot on the ast2500-evb. Signed-off-by: Joel Stanley --- hw/misc/aspeed_sdmc.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) -- 2.17.1 Reviewed-by: Cédric Le Goater diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c index 9ece545c4ffa..522e01ef8c0d 100644 --- a/hw/misc/aspeed_sdmc.c +++ b/hw/misc/aspeed_sdmc.c @@ -23,6 +23,10 @@ /* Configuration Register */ #define R_CONF (0x04 / 4) +/* Control/Status Register #1 (ast2500) */ +#define R_STATUS1 (0x60 / 4) +#define PHY_BUSY_STATE BIT(0) + /* * Configuration register Ox4 (for Aspeed AST2400 SOC) * @@ -137,6 +141,17 @@ static void aspeed_sdmc_write(void *opaque, hwaddr addr, uint64_t data, g_assert_not_reached(); } } + if (s->silicon_rev == AST2500_A0_SILICON_REV || + s->silicon_rev == AST2500_A1_SILICON_REV) { + switch (addr) { + case R_STATUS1: + /* Will never return 'busy' */ + data &= ~PHY_BUSY_STATE; + break; + default: + break; + } + } s->regs[addr] = data; }