From patchwork Fri Jun 29 00:15:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 140488 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp200568ljj; Thu, 28 Jun 2018 17:20:45 -0700 (PDT) X-Google-Smtp-Source: AAOMgpfi0fJhUCWI+XwfH+39z46gxc5kgOBd/EgIkLYyd2HzzaeNwgRoNQQ7HOh+VpsQf8SvmYfg X-Received: by 2002:ac8:d4b:: with SMTP id r11-v6mr11762773qti.408.1530231645408; Thu, 28 Jun 2018 17:20:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1530231645; cv=none; d=google.com; s=arc-20160816; b=wkMmpX5KdFobN9wZ014gtgoLGayCfVQ9YFrw5lQAjnCevRe1oM2IhTr/5cqjY7cS2d L8wh01MEbU3zefr4Wsg8HvzEeqbVlBgjZvlsZTfd1tWGIHu/6/YL2zvBRuUTNlcFZRN6 ZvShJeLm+VjMVH6FytH1q09r4GP43fHQnMeGj9UFR68XLuJNWb8uyA+t+K9YkOI+zUy/ Xb/oOPPzmWzZJgiKcrqH6L1AujzWmdJLemLKjcAhn5K9fEyLo716K210EEdsrm6Jx/4i 66Pn9EHKjR3PUJK3R6337vMijBdh32PjGwwINFuCKWHFFWQ6SmSxsI0H7EEkQleZ+n6N 4Q9g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=qCoeOPRxfqBzz9U1Vv3Tu63bMTIpVPlkzyb0DKca5aA=; b=IbsndRWuNK064M817lXI5MkaGxA/b+DEzHnw9Nh5O3yODIXXHiQzAuHK7FE59r7/Ah R3LxaCSV5/tl8BoOh7Qt7heT+p4M9XevBVNabL+1Ruv4AEnod6hx2Phx354OdAEy0SVQ 0MpmA8zC/koVpSZ8ArMA5hpzdGwqHt5kqYXXy6uP76JisIFjHyBGOF1dLmOr0FGRk6G3 wMDROsYatPt41zSP45bz5/Tzu8LsBPsRLY2fAdzykBrMJJDRAxNsCFNOF0kyfevBXRv3 oi5ccPqj66FeRyhdyDYtv3Mb+1cHnsa8S/a96kvpAzG7V2zxE8hDlWVkWIjFL13u2wxW W1IQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=NpFTEKNg; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id 27-v6si5233198qkt.153.2018.06.28.17.20.45 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 28 Jun 2018 17:20:45 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=NpFTEKNg; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:39248 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fYh9Y-00075e-TZ for patch@linaro.org; Thu, 28 Jun 2018 20:20:44 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41369) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fYh4k-00041N-0g for qemu-devel@nongnu.org; Thu, 28 Jun 2018 20:15:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fYh4h-0006dI-Km for qemu-devel@nongnu.org; Thu, 28 Jun 2018 20:15:45 -0400 Received: from mail-pf0-x22a.google.com ([2607:f8b0:400e:c00::22a]:42625) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fYh4h-0006bo-F7 for qemu-devel@nongnu.org; Thu, 28 Jun 2018 20:15:43 -0400 Received: by mail-pf0-x22a.google.com with SMTP id v9-v6so2217450pff.9 for ; Thu, 28 Jun 2018 17:15:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qCoeOPRxfqBzz9U1Vv3Tu63bMTIpVPlkzyb0DKca5aA=; b=NpFTEKNgXJFVxapcFnnRhZb8ww9RZZBAxkES07rf7QGi3ZXnJCBb+1k0l79ycQqzch w6eUL+kY7WMWtLY3+kwFXJ0WJDIaS1/QyrYpWwCoN6qCu/2BuMnUz78/q/wZTUnk63b3 6EVe9KE1S9Eva1vQ5taGd70hY/GdMxaYQeMAI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qCoeOPRxfqBzz9U1Vv3Tu63bMTIpVPlkzyb0DKca5aA=; b=k6mc539irYc4ABqoDzDpaDU1n5V30EaU/KcisV8eAyjt1ziwIlXPpCtZfJHfuA883k UWsoD1WKIciStJQqwlTid+HPTSc4N/sFpxdoraj05Bz+ZtDhdgyd1Of1IXU4jlBjM0zD 7gAS5k02q/TAwxNOQv77kHs3SRZ0Gviuw9DCsE+8lCGA6X0i45yvsfWs/BXnLK5IKPiF zPCPZjl4C6UUUHuVxzfdDHp/KM5rY6mnDQ/paAuBS6SOCvqwART7cpbUPG6XS2/6e73j rxrHohU+ce9BDvmAkgcYE9UGCQn9EPEScbYtWGxE3/byRXm6so0QU6ovJtzS//SZSR65 zc0Q== X-Gm-Message-State: APt69E0tgXcaFMidSGPmgVqy1dD9JRwxTghG6oc1AAiNSfVoXuQTsXoZ w+H7Ac85JzD0WKE59Hc4u4zdKFZPFPc= X-Received: by 2002:a65:6699:: with SMTP id b25-v6mr10723196pgw.426.1530231342298; Thu, 28 Jun 2018 17:15:42 -0700 (PDT) Received: from cloudburst.twiddle.net (97-126-112-211.tukw.qwest.net. [97.126.112.211]) by smtp.gmail.com with ESMTPSA id j3-v6sm11687618pff.35.2018.06.28.17.15.41 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 28 Jun 2018 17:15:41 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 28 Jun 2018 17:15:33 -0700 Message-Id: <20180629001538.11415-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180629001538.11415-1-richard.henderson@linaro.org> References: <20180629001538.11415-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::22a Subject: [Qemu-devel] [PATCH 1/6] target/arm: Fix SVE signed division vs x86 overflow exception X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We already check for the same condition within the normal integer sdiv and sdiv64 helpers. Use a slightly different formation that does not require deducing the expression type. Fixes: f97cfd596ed Signed-off-by: Richard Henderson --- target/arm/sve_helper.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) -- 2.17.1 Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c index 790cbacd14..7d7fc90566 100644 --- a/target/arm/sve_helper.c +++ b/target/arm/sve_helper.c @@ -369,7 +369,13 @@ void HELPER(NAME)(void *vd, void *vn, void *vm, void *vg, uint32_t desc) \ #define DO_MIN(N, M) ((N) >= (M) ? (M) : (N)) #define DO_ABD(N, M) ((N) >= (M) ? (N) - (M) : (M) - (N)) #define DO_MUL(N, M) (N * M) -#define DO_DIV(N, M) (M ? N / M : 0) + +/* The zero divisor case is architectural; the -1 divisor case works + * around the x86 INT_MIN / -1 overflow exception without having to + * deduce the minimum integer for the type of the expression. + */ +#define DO_SDIV(N, M) (unlikely(M == 0) ? 0 : unlikely(M == -1) ? -N : N / M) +#define DO_UDIV(N, M) (unlikely(M == 0) ? 0 : N / M) DO_ZPZZ(sve_and_zpzz_b, uint8_t, H1, DO_AND) DO_ZPZZ(sve_and_zpzz_h, uint16_t, H1_2, DO_AND) @@ -477,11 +483,11 @@ DO_ZPZZ(sve_umulh_zpzz_h, uint16_t, H1_2, do_mulh_h) DO_ZPZZ(sve_umulh_zpzz_s, uint32_t, H1_4, do_mulh_s) DO_ZPZZ_D(sve_umulh_zpzz_d, uint64_t, do_umulh_d) -DO_ZPZZ(sve_sdiv_zpzz_s, int32_t, H1_4, DO_DIV) -DO_ZPZZ_D(sve_sdiv_zpzz_d, int64_t, DO_DIV) +DO_ZPZZ(sve_sdiv_zpzz_s, int32_t, H1_4, DO_SDIV) +DO_ZPZZ_D(sve_sdiv_zpzz_d, int64_t, DO_SDIV) -DO_ZPZZ(sve_udiv_zpzz_s, uint32_t, H1_4, DO_DIV) -DO_ZPZZ_D(sve_udiv_zpzz_d, uint64_t, DO_DIV) +DO_ZPZZ(sve_udiv_zpzz_s, uint32_t, H1_4, DO_UDIV) +DO_ZPZZ_D(sve_udiv_zpzz_d, uint64_t, DO_UDIV) /* Note that all bits of the shift are significant and not modulo the element size. */