From patchwork Fri Jun 22 14:11:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 139667 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp948435lji; Fri, 22 Jun 2018 07:35:16 -0700 (PDT) X-Google-Smtp-Source: ADUXVKKTd4pNcPvtF9jx0uH8+zI1o04QBGaf1yj5pXNNV4b0RORKPGe1SiRgIwq5ILooa7NtqFJY X-Received: by 2002:aed:3108:: with SMTP id 8-v6mr1593922qtg.107.1529678116213; Fri, 22 Jun 2018 07:35:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1529678116; cv=none; d=google.com; s=arc-20160816; b=vdj3Lz+VeXdvoee2wCUfamtmydXYVunXqRKHNQKuY4sLNfSapSFYnsi1g+2I9Ogvf7 2aYH9eQjU05n9TYqpMS6+fR0KkkU256acURm/4xMXlYt8SPoiSqzgeDQRUrShNdWVTnr Whzk3wCPd5L/pW1uJIW1l9tl1pWL/CYnMOXJws11YIb5Euoclizqi72NG41iuYfml2A9 qEyiFd1F5RkyQ4hUA0+9zIRsEerO0iSKih6tPc13QgHpe3pjfjT31AUWpUPema7ioh7n u2XbH9waIJ6I0Z1HrCkqDdQ1GZaZGckGh2n4zTckOVd7uuZfiirDHZsqeXiohvoKENa7 oK6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=IEGZXFnFNMOWMxKC/DUaSek0uOvs3FGzAO/YFETY3Ak=; b=J3IfDhIOd3x8y2E2gXT9rrNpFt5sFot119TzxqUrKClH3cSbjwKgyQMLNcD9euzP6B UO/98v+RoWsKL2S0ucAJsdKx4QALououXbUyTMzxyuiInR/TRzMIgyWkuD/IjA+1n0lC P8ulquxoHwdK5asSrXq6LG13AwMWIBoH/0Sb9ZfmSZwfD7XX5s9lVFxEZvkp82KAvLS3 ufHas+2pHK45W7VD8F0gmWzKJZScx5kQw+JHDeKZ4ZysGGYXf/uCZrqMumyItq75Dipn rSb58APWJGapGIAjDitsXsGk2sCj6SNmyd4izwHcjaVaAFuI80YG6s8EXitQxxw3zHFN MOvA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=HlGabiBE; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id a1-v6si63369qvc.52.2018.06.22.07.35.15 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 22 Jun 2018 07:35:16 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=HlGabiBE; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:34440 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWN9f-0008M2-GJ for patch@linaro.org; Fri, 22 Jun 2018 10:35:15 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38567) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWMnQ-000689-1V for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fWMnO-00069p-LD for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:15 -0400 Received: from mail-wr0-x241.google.com ([2a00:1450:400c:c0c::241]:43966) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fWMnO-00068m-3p for qemu-devel@nongnu.org; Fri, 22 Jun 2018 10:12:14 -0400 Received: by mail-wr0-x241.google.com with SMTP id d2-v6so6830565wrm.10 for ; Fri, 22 Jun 2018 07:12:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IEGZXFnFNMOWMxKC/DUaSek0uOvs3FGzAO/YFETY3Ak=; b=HlGabiBEKg6Ao/kQitgp2Xr3nGPDG6Yqe6K9HRPpyaaOG5d0H7qp5dI69JcHQUPaca U6XBrhJ+01C5EkfW1YvGz7IS+A/cUvHSIDlgyQbp8hTo2P2q7b6tVB1jsKv+uiBmZ9wk vLOtJagMdYruOdIjhNrifA2ckPc1m697NQxsA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IEGZXFnFNMOWMxKC/DUaSek0uOvs3FGzAO/YFETY3Ak=; b=WqEiu/yZkvwNjmCKGGpNZBTqUHVSYSCVpAE6ul83dLJGA0peLCH2kc4UHby0dzrlnO yKIV9l3BdA8F2EoQr8zbeiB4vGb73CDeC7aQtJ0z+DzZO2ypml9hzW/E3SWuvHSzmJEc wGGy6L+a9AsxScgca2MF/OZiA3poG34+R92WJb5d0XoYoYlmhyrNBaOYcmrJM7zEkuQP JfOpOGk21RdWduUfDGzetX10rb00GZjfHIQAzNPVwrNOtMdBWD3acidUkatP2i6I+wxH FffgnUi9gsu/OWqQvfq+7GvitQlPKq9FsjOyfB6FN5T4U2d71ZCEmc7JW8c2z0eX4qqW EaeA== X-Gm-Message-State: APt69E2LsPQXUwzlhhqVnxzCG8dAGmmgQNWdBkU1QHnmWSq/XnySjzI6 a6U/okcB8N5rpnx6dcI/6F/kNA== X-Received: by 2002:adf:9769:: with SMTP id r96-v6mr1841835wrb.57.1529676733063; Fri, 22 Jun 2018 07:12:13 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id h11-v6sm7364260wrs.85.2018.06.22.07.12.07 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 22 Jun 2018 07:12:10 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id A89C03E097F; Fri, 22 Jun 2018 15:12:05 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org Date: Fri, 22 Jun 2018 15:11:50 +0100 Message-Id: <20180622141205.16306-8-alex.bennee@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180622141205.16306-1-alex.bennee@linaro.org> References: <20180622141205.16306-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::241 Subject: [Qemu-devel] [RISU PATCH v4 07/22] risugen: add --sve support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This is similar to the approach used by the FP/simd data in so far as we generate a block of random data and then load into it. The loading is actually done by the current vector length but that is implicit in the run anyway. Signed-off-by: Alex Bennée --- v2 - only one SIMD/FP/SVE block as they alias - move efficient loading as suggested by Dave --- risugen | 3 +++ risugen_arm.pm | 56 ++++++++++++++++++++++++++++++++++++++++++-------- 2 files changed, 50 insertions(+), 9 deletions(-) -- 2.17.1 Reviewed-by: Richard Henderson diff --git a/risugen b/risugen index 488d804..de3f5ea 100755 --- a/risugen +++ b/risugen @@ -319,6 +319,7 @@ sub main() my $condprob = 0; my $fpscr = 0; my $fp_enabled = 1; + my $sve_enabled = 1; my $big_endian = 0; my ($infile, $outfile); @@ -336,6 +337,7 @@ sub main() }, "be" => sub { $big_endian = 1; }, "no-fp" => sub { $fp_enabled = 0; }, + "sve" => sub { $sve_enabled = 1; }, ) or return 1; # allow "--pattern re,re" and "--pattern re --pattern re" @pattern_re = split(/,/,join(',',@pattern_re)); @@ -363,6 +365,7 @@ sub main() 'fpscr' => $fpscr, 'numinsns' => $numinsns, 'fp_enabled' => $fp_enabled, + 'sve_enabled' => $sve_enabled, 'outfile' => $outfile, 'details' => \%insn_details, 'keys' => \@insn_keys, diff --git a/risugen_arm.pm b/risugen_arm.pm index 2f10d58..bb3ee90 100644 --- a/risugen_arm.pm +++ b/risugen_arm.pm @@ -472,14 +472,51 @@ sub write_random_aarch64_fpdata() } } -sub write_random_aarch64_regdata($) +sub write_random_aarch64_svedata() { - my ($fp_enabled) = @_; + # Load SVE registers + my $align = 16; + my $vq = 16; # quadwords per vector + my $datalen = (32 * $vq * 16) + $align; + + write_pc_adr(0, (3 * 4) + ($align - 1)); # insn 1 + write_align_reg(0, $align); # insn 2 + write_jump_fwd($datalen); # insn 3 + + # align safety + for (my $i = 0; $i < ($align / 4); $i++) { + # align with nops + insn32(0xd503201f); + }; + + for (my $rt = 0; $rt <= 31; $rt++) { + for (my $q = 0; $q < $vq; $q++) { + write_random_fpreg_var(4); # quad + } + } + + # Reset all the predicate registers to all true + for (my $p = 0; $p < 16; $p++) { + insn32(0x2518e3e0 | $p); + } + + for (my $rt = 0; $rt <= 31; $rt++) { + # ldr z$rt, [x0, #$rt, mul vl] + insn32(0x85804000 + $rt + (($rt & 7) << 10) + (($rt & 0x18) << 13)); + } +} + +sub write_random_aarch64_regdata($$) +{ + my ($fp_enabled, $sve_enabled) = @_; # clear flags insn32(0xd51b421f); # msr nzcv, xzr - if ($fp_enabled) { - # load floating point / SIMD registers + # Load floating point / SIMD registers + # (one or the other as they overlap) + if ($sve_enabled) { + write_random_aarch64_svedata(); + } elsif ($fp_enabled) { write_random_aarch64_fpdata(); } @@ -490,12 +527,12 @@ sub write_random_aarch64_regdata($) } } -sub write_random_register_data($) +sub write_random_register_data($$) { - my ($fp_enabled) = @_; + my ($fp_enabled, $sve_enabled) = @_; if ($is_aarch64) { - write_random_aarch64_regdata($fp_enabled); + write_random_aarch64_regdata($fp_enabled, $sve_enabled); } else { write_random_arm_regdata($fp_enabled); } @@ -893,6 +930,7 @@ sub write_test_code($$$$$$$$) my $fpscr = $params->{ 'fpscr' }; my $numinsns = $params->{ 'numinsns' }; my $fp_enabled = $params->{ 'fp_enabled' }; + my $sve_enabled = $params->{ 'sve_enabled' }; my $outfile = $params->{ 'outfile' }; my %insn_details = %{ $params->{ 'details' } }; @@ -918,7 +956,7 @@ sub write_test_code($$$$$$$$) write_memblock_setup(); } # memblock setup doesn't clean its registers, so this must come afterwards. - write_random_register_data($fp_enabled); + write_random_register_data($fp_enabled, $sve_enabled); write_switch_to_test_mode(); for my $i (1..$numinsns) { @@ -930,7 +968,7 @@ sub write_test_code($$$$$$$$) # Rewrite the registers periodically. This avoids the tendency # for the VFP registers to decay to NaNs and zeroes. if ($periodic_reg_random && ($i % 100) == 0) { - write_random_register_data($fp_enabled); + write_random_register_data($fp_enabled, $sve_enabled); write_switch_to_test_mode(); } progress_update($i);