From patchwork Mon May 14 22:12:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 135768 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp191751lji; Mon, 14 May 2018 15:19:58 -0700 (PDT) X-Google-Smtp-Source: AB8JxZpt6WmpofVFUj1P7gnXzPI8aBb7bO7Yhkq/3wQOOULpsr57e+1f9AoZnsoTPS+97wSpcLcc X-Received: by 2002:a0c:8856:: with SMTP id 22-v6mr10848938qvm.79.1526336397952; Mon, 14 May 2018 15:19:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1526336397; cv=none; d=google.com; s=arc-20160816; b=E8go+ZLIrqbACt5iNb0C9SP4FPit9fu4dHMR0lkHjGbupFo2Ez4RoAOK9s5VFYzMgs QQmb/7DMF2tEZVnjCAYBzQmeIufm4j9CwXuuN8Dx0cZgylmPSPbn8O24xuTb/0OcSU7i yayCNoDeRjTkefoEgGVA1Yc5vvl/3AAZ0bqmRCFyGbH7jcxHpnPl3bEC4+m8jFn0vWM5 9eLN6UQZyihwTrMOspqsOsC6R98Bw4rX+16p74utaGBWoy0WT7DWv9lBN47m4jpBnX7u vembQsy1eIPcovSa3nFX8pRr1lVGpSoAja7kJ+jBgi6af6SDUd3A02gXs4ckEHXnQBQc 4QIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=3Gt6m5cGwrRSwWZ854aVfOdGATsWs+vxTefTZvehpJc=; b=OEQ/u6oCYqiQIdA1xTcgbkT+URVBWs4y3skO5wn56d2jXKPIulFzy8l2PZpDtFy4nB EENLZsWlXeavC7Jg743cnstNc0RuukXv0gipVVwQzuS0tSm30TiQGK9O3AUwolZzlO8h 0HMNPNXe1Zyoc9mo8P/JcNiU8chC5tWc4YKzNgyDBfJOw9B8aRGXJINw0d8dQoRViJtS O26mhAN5PU1ivKuE4WcX5fv1U6RM7qg7LD+5TnxQuxXjwUzxlaSDPh3uARWudyQsNJ+M dnYiX+GbRroRo+UIImg5u02L8b2APpwOqd4ex9TLQLPmMPWToL2w6/VmJrfhuFGj2aVh AU6w== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=IC0Mhdyz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id 26-v6si9229858qvv.71.2018.05.14.15.19.57 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 14 May 2018 15:19:57 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=IC0Mhdyz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:49917 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fILoz-0005Xj-Bw for patch@linaro.org; Mon, 14 May 2018 18:19:57 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52480) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fILhv-0007yG-E4 for qemu-devel@nongnu.org; Mon, 14 May 2018 18:12:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fILhu-0007mc-BS for qemu-devel@nongnu.org; Mon, 14 May 2018 18:12:39 -0400 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:40995) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fILhu-0007km-5E for qemu-devel@nongnu.org; Mon, 14 May 2018 18:12:38 -0400 Received: by mail-pf0-x242.google.com with SMTP id v63-v6so6663117pfk.8 for ; Mon, 14 May 2018 15:12:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3Gt6m5cGwrRSwWZ854aVfOdGATsWs+vxTefTZvehpJc=; b=IC0Mhdyz1pIkQRdu7TQVS1K+eebs3RGicGGpfrpPYyI6FXcyb4axp4NMAsePVmoNHW V58zd0YDr5AVZtJ2rkkTq2pe7Ue1+VoolphTSXI9d43jlirWe5vJEN67bxh+NLfhsF/v xV9uT0f3bt5SpI2/MKMkGOWnffqM+blHxijaU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3Gt6m5cGwrRSwWZ854aVfOdGATsWs+vxTefTZvehpJc=; b=nPJugY69LM9ZAbQNYQ6HB6eM7PdwpyDkhzNo1NKjIfMV+LqKKysNvJ7JpkRliTyG60 LBvMXb3kpinNPlrzLLNdOLq7ze1cbqxgoGu37PYUTGP73vCML5txxKxy7TkhtLYv8kuT WSvwvrJB+CAEI5gyoXmX6uDdFjYAgo/cAJW1Fx4wyhur/RSQpae0YfPD01WjLv9ZJD4A +uHHYmTthc2Qk3wYaNO53yU/aAy0salD+x493/9rRHmbiSs/IHxaaS83vX/5arceuVOg yYrCSgAyf1EbinRZzxFOOSW4Lshp6OSUs4q0eD9936l6pj7Lst4jVN2vFBy879+Cq0e5 cSzA== X-Gm-Message-State: ALKqPweVSH5WgFiwFdxhmL6bLetoMMrk7c2Htgx4WgqOs8YF0OZ8f/Yf 0nLHUnWNgMvqiRWcgZxA/gJ08hOuEPg= X-Received: by 2002:a63:8849:: with SMTP id l70-v6mr10026762pgd.49.1526335956835; Mon, 14 May 2018 15:12:36 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id y2-v6sm14512457pgp.92.2018.05.14.15.12.35 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 14 May 2018 15:12:35 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 14 May 2018 15:12:02 -0700 Message-Id: <20180514221219.7091-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180514221219.7091-1-richard.henderson@linaro.org> References: <20180514221219.7091-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [PATCH v5 11/28] target/arm: squash FZ16 behaviour for conversions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Alex Bennée The ARM ARM specifies FZ16 is suppressed for conversions. Rather than pushing this logic into the softfloat code we can simply save the FZ state and temporarily disable it for the softfloat call. Reviewed-by: Peter Maydell Signed-off-by: Alex Bennée Signed-off-by: Richard Henderson --- v4 - float16_to_floatX squished the wrong softfloat bit for FZ16; need to adjust input denormals in this case. --- target/arm/helper.c | 40 ++++++++++++++++++++++++++++++++++++---- 1 file changed, 36 insertions(+), 4 deletions(-) -- 2.17.0 diff --git a/target/arm/helper.c b/target/arm/helper.c index a1c1dc5bbe..e05c7230d4 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11542,22 +11542,54 @@ uint32_t HELPER(set_neon_rmode)(uint32_t rmode, CPUARMState *env) /* Half precision conversions. */ float32 HELPER(vfp_fcvt_f16_to_f32)(float16 a, void *fpstp, uint32_t ahp_mode) { - return float16_to_float32(a, !ahp_mode, fpstp); + /* Squash FZ16 to 0 for the duration of conversion. In this case, + * it would affect flushing input denormals. + */ + float_status *fpst = fpstp; + flag save = get_flush_inputs_to_zero(fpst); + set_flush_inputs_to_zero(false, fpst); + float32 r = float16_to_float32(a, !ahp_mode, fpst); + set_flush_inputs_to_zero(save, fpst); + return r; } float16 HELPER(vfp_fcvt_f32_to_f16)(float32 a, void *fpstp, uint32_t ahp_mode) { - return float32_to_float16(a, !ahp_mode, fpstp); + /* Squash FZ16 to 0 for the duration of conversion. In this case, + * it would affect flushing output denormals. + */ + float_status *fpst = fpstp; + flag save = get_flush_to_zero(fpst); + set_flush_to_zero(false, fpst); + float16 r = float32_to_float16(a, !ahp_mode, fpst); + set_flush_to_zero(save, fpst); + return r; } float64 HELPER(vfp_fcvt_f16_to_f64)(float16 a, void *fpstp, uint32_t ahp_mode) { - return float16_to_float64(a, !ahp_mode, fpstp); + /* Squash FZ16 to 0 for the duration of conversion. In this case, + * it would affect flushing input denormals. + */ + float_status *fpst = fpstp; + flag save = get_flush_inputs_to_zero(fpst); + set_flush_inputs_to_zero(false, fpst); + float64 r = float16_to_float64(a, !ahp_mode, fpst); + set_flush_inputs_to_zero(save, fpst); + return r; } float16 HELPER(vfp_fcvt_f64_to_f16)(float64 a, void *fpstp, uint32_t ahp_mode) { - return float64_to_float16(a, !ahp_mode, fpstp); + /* Squash FZ16 to 0 for the duration of conversion. In this case, + * it would affect flushing output denormals. + */ + float_status *fpst = fpstp; + flag save = get_flush_to_zero(fpst); + set_flush_to_zero(false, fpst); + float16 r = float64_to_float16(a, !ahp_mode, fpst); + set_flush_to_zero(save, fpst); + return r; } #define float32_two make_float32(0x40000000)