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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id q123si808073qke.105.2018.04.23.00.56.25 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 23 Apr 2018 00:56:25 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Received: from localhost ([::1]:51973 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fAWKm-0001Ui-U8 for patch@linaro.org; Mon, 23 Apr 2018 03:56:24 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33317) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fAWIF-0000Vu-2M for qemu-devel@nongnu.org; Mon, 23 Apr 2018 03:53:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fAWID-0000a9-LN for qemu-devel@nongnu.org; Mon, 23 Apr 2018 03:53:47 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:6653) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fAWID-0000YJ-Cj for qemu-devel@nongnu.org; Mon, 23 Apr 2018 03:53:45 -0400 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w3N7nDhL004589; Mon, 23 Apr 2018 09:53:41 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2hftrwhm3f-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 23 Apr 2018 09:53:41 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 132523F; Mon, 23 Apr 2018 07:53:41 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node1.st.com [10.75.127.13]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E766D14D5; Mon, 23 Apr 2018 07:53:40 +0000 (GMT) Received: from gnb.st.com (10.75.127.48) by SFHDAG5NODE1.st.com (10.75.127.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 23 Apr 2018 09:53:40 +0200 From: Christophe Lyon To: , , , , Date: Mon, 23 Apr 2018 09:51:55 +0200 Message-ID: <20180423075215.4572-5-christophe.lyon@st.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20180423075215.4572-1-christophe.lyon@st.com> References: <20180423075215.4572-1-christophe.lyon@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG4NODE3.st.com (10.75.127.12) To SFHDAG5NODE1.st.com (10.75.127.13) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-04-23_04:, , signatures=0 X-MIME-Autoconverted: from 8bit to quoted-printable by mx07-.pphosted.com id w3N7nDhL004589 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 62.209.51.94 Subject: [Qemu-devel] [ARM/FDPIC v2 4/4] linux-user: ARM-FDPIC: Add support for signals for FDPIC targets X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The FDPIC restorer needs to deal with a function descriptor, hence we have to extend 'retcode' such that it can hold the instructions needed to perform this. The restorer sequence uses the same thumbness as the exception handler (mainly to support Thumb-only architectures). Co-Authored-By: Mickaël Guêné Signed-off-by: Christophe Lyon -- 2.6.3 diff --git a/linux-user/signal.c b/linux-user/signal.c index 8d9e6e8..d01b459 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -2045,13 +2045,13 @@ struct sigframe_v1 { struct target_sigcontext sc; abi_ulong extramask[TARGET_NSIG_WORDS-1]; - abi_ulong retcode; + abi_ulong retcode[4]; }; struct sigframe_v2 { struct target_ucontext_v2 uc; - abi_ulong retcode; + abi_ulong retcode[4]; }; struct rt_sigframe_v1 @@ -2060,14 +2060,14 @@ struct rt_sigframe_v1 abi_ulong puc; struct target_siginfo info; struct target_ucontext_v1 uc; - abi_ulong retcode; + abi_ulong retcode[4]; }; struct rt_sigframe_v2 { struct target_siginfo info; struct target_ucontext_v2 uc; - abi_ulong retcode; + abi_ulong retcode[4]; }; #define TARGET_CONFIG_CPU_32 1 @@ -2090,6 +2090,21 @@ static const abi_ulong retcodes[4] = { SWI_SYS_RT_SIGRETURN, SWI_THUMB_RT_SIGRETURN }; +/* + * Stub needed to make sure the FD register (r9) contains the right + * value. + */ +static const unsigned long sigreturn_fdpic_codes[3] = { + 0xe59fc004, /* ldr r12, [pc, #4] to read function descriptor */ + 0xe59c9004, /* ldr r9, [r12, #4] to setup GOT */ + 0xe59cf000 /* ldr pc, [r12] to jump into restorer */ +}; + +static const unsigned long sigreturn_fdpic_thumb_codes[3] = { + 0xc008f8df, /* ldr r12, [pc, #8] to read function descriptor */ + 0x9004f8dc, /* ldr r9, [r12, #4] to setup GOT */ + 0xf000f8dc /* ldr pc, [r12] to jump into restorer */ +}; static inline int valid_user_regs(CPUARMState *regs) { @@ -2149,7 +2164,21 @@ setup_return(CPUARMState *env, struct target_sigaction *ka, { abi_ulong handler = ka->_sa_handler; abi_ulong retcode; - int thumb = handler & 1; + abi_ulong funcdesc_ptr = 0; + + int thumb; + int is_fdpic = ((TaskState *)thread_cpu->opaque)->is_fdpic; + + if (is_fdpic) { + /* In FDPIC mode, ka->_sa_handler points to a function + * descriptor (FD). The first word contains the address of the + * handler. The second word contains the value of the PIC + * register (r9). */ + funcdesc_ptr = ka->_sa_handler; + get_user_ual(handler, funcdesc_ptr); + } + thumb = handler & 1; + uint32_t cpsr = cpsr_read(env); cpsr &= ~CPSR_IT; @@ -2160,20 +2189,50 @@ setup_return(CPUARMState *env, struct target_sigaction *ka, } if (ka->sa_flags & TARGET_SA_RESTORER) { - retcode = ka->sa_restorer; - } else { - unsigned int idx = thumb; + if (is_fdpic) { + /* For FDPIC we ensure that the restorer is called with a + * correct r9 value. For that we need to write code on + * the stack that sets r9 and jumps back to restorer + * value. + */ + if (thumb) { + __put_user(sigreturn_fdpic_thumb_codes[0], rc); + __put_user(sigreturn_fdpic_thumb_codes[1], rc + 1); + __put_user(sigreturn_fdpic_thumb_codes[2], rc + 2); + __put_user((abi_ulong)ka->sa_restorer, rc + 3); + } else { + __put_user(sigreturn_fdpic_codes[0], rc); + __put_user(sigreturn_fdpic_codes[1], rc + 1); + __put_user(sigreturn_fdpic_codes[2], rc + 2); + __put_user((abi_ulong)ka->sa_restorer, rc + 3); + } - if (ka->sa_flags & TARGET_SA_SIGINFO) { - idx += 2; + retcode = rc_addr + thumb; + } else { + retcode = ka->sa_restorer; } + } else { + if (is_fdpic) { + qemu_log_mask(LOG_UNIMP, + "arm: FDPIC signal return not implemented"); + abort(); + } else { + unsigned int idx = thumb; + + if (ka->sa_flags & TARGET_SA_SIGINFO) { + idx += 2; + } - __put_user(retcodes[idx], rc); + __put_user(retcodes[idx], rc); - retcode = rc_addr + thumb; + retcode = rc_addr + thumb; + } } env->regs[0] = usig; + if (is_fdpic) { + get_user_ual(env->regs[9], funcdesc_ptr + 4); + } env->regs[13] = frame_addr; env->regs[14] = retcode; env->regs[15] = handler & (thumb ? ~1 : ~3); @@ -2270,7 +2329,7 @@ static void setup_frame_v1(int usig, struct target_sigaction *ka, __put_user(set->sig[i], &frame->extramask[i - 1]); } - setup_return(regs, ka, &frame->retcode, frame_addr, usig, + setup_return(regs, ka, frame->retcode, frame_addr, usig, frame_addr + offsetof(struct sigframe_v1, retcode)); unlock_user_struct(frame, frame_addr, 1); @@ -2292,7 +2351,7 @@ static void setup_frame_v2(int usig, struct target_sigaction *ka, setup_sigframe_v2(&frame->uc, set, regs); - setup_return(regs, ka, &frame->retcode, frame_addr, usig, + setup_return(regs, ka, frame->retcode, frame_addr, usig, frame_addr + offsetof(struct sigframe_v2, retcode)); unlock_user_struct(frame, frame_addr, 1); @@ -2347,7 +2406,7 @@ static void setup_rt_frame_v1(int usig, struct target_sigaction *ka, __put_user(set->sig[i], &frame->uc.tuc_sigmask.sig[i]); } - setup_return(env, ka, &frame->retcode, frame_addr, usig, + setup_return(env, ka, frame->retcode, frame_addr, usig, frame_addr + offsetof(struct rt_sigframe_v1, retcode)); env->regs[1] = info_addr; @@ -2378,7 +2437,7 @@ static void setup_rt_frame_v2(int usig, struct target_sigaction *ka, setup_sigframe_v2(&frame->uc, set, env); - setup_return(env, ka, &frame->retcode, frame_addr, usig, + setup_return(env, ka, frame->retcode, frame_addr, usig, frame_addr + offsetof(struct rt_sigframe_v2, retcode)); env->regs[1] = info_addr;